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Mode Support for SimVision “Stop Simulation” Button
Prior to Incisive Enterprise Simulator (IES) 12.1, clicking the SimVision "Stop Simulation" button would stop the simulation both in an HDL context and in a Specman context if Specman was present in the simulation. To provide better flexibility in the exact place where you want to pause, the...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Wed, May 8 2013
Develop For Debugability – Part II
Looking at Coding Styles for Debug In this blog post we are going to discuss 3 different cases where coding style can help you debug easier: 1. Declarative vs. Sequential Coding 2. Method Call Depth 3. Calculating if-else Conditions Declarative vs. Sequential Coding When modeling your testbench you will...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Apr 23 2013
Develop for Debugability – Part 1
Debugging is the most time-critical activity of any verification engineer. Finding a bug is very often a combination of having a good hunch, experience, and the quality of testbench code that you need to analyze. Since having a good hunch and experience is something everyone needs to acquire for themselves...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Mon, Apr 8 2013
Incisive Debug Analyzer is a Finalist for EETimes and EDN ACE Software Product of the Year
Great news.... Incisive Debug Analyzer (IDA) is one of five finalists for the EETimes/EDN Annual Creativity in Electronics (ACE) Awards in the Software Product of the Year category. In addition to IDA, Lip-Bu Tan and Cadence are also finalists for ACE Executive of the Year and Company of the Year, respectively...
Posted to
Functional Verification
(Weblog)
by
Karnane
on Mon, Mar 25 2013
Planning to Go to DVCon 2013 Next Week? If So, Don't Miss the Debug Tutorial Feb. 28th!
TUTORIAL : Fast Track Your UVM Debug Productivity with Simulation and Acceleration Session: 5T on Thursday, Feb. 28 th from 8:30AM - 12:00PM For more details on the debug tutorial, click here This debug tutorial will highlight how customers can reduce their debug turnaround time by employing the most...
Posted to
Functional Verification
(Weblog)
by
Karnane
on Wed, Feb 20 2013
Using the ‘restore -append_logs' Feature
As described in Specman Advanced Option appnote , Specman Elite supports dynamic load and reseeding. This allows the user to run the simulation up to a certain point (often until right after reset) and save the simulation. The user can then restore the simulation and run many different tests either by...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Feb 12 2013
DVCon 2013 for the Specmaniac
At the upcoming DVCon (in San Jose, CA February 25-28) , Cadence will cover all aspects of our verification technologies and methodologies (full list of Cadence-sponsored events is here ). Of course, Team Specman cannot resist drawing your attention to the many activities that will feature Specman and...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Thu, Feb 7 2013
Improve Debug Productivity - SimVision Video Series on YouTube
Most verification customers claim that they are spending over 50% of their verification effort in debug. If so, you should check out these latest SimVision debug videos since you will quickly see how SimVision can enable you to be much more productive in less than an hour after viewing the videos. Take...
Posted to
Functional Verification
(Weblog)
by
Karnane
on Tue, Feb 5 2013
DVCon 2013 Preview – Learn from Other Design and Verification Engineers
The Design and Verification Conference ( DVCon 2013 ) will be held Feb. 25-28 at the Doubletree Hotel in San Jose, California - and this year's program has something of interest for almost every design and verification engineer. The conference offers 12 technical sessions, 10 tutorials, two panels...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Jan 24 2013
Specman: An Assumed Generation Issue and its Real Root Cause
Random generation is always a complex task, and differences in results are usually very hard to debug. Besides, generation misbehavior always rings many bells in R&D :-) A customer reported a random stability issue, explaining that the generator (IntelliGen) generated different values with the same...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Mon, Jan 21 2013
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