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coverage

DVClub Talk: Software-Inspired Technique Predicts IC Verification Closure

What's the hardest question for a verification manager to answer? Greg Smith, senior verification manager at Oracle, found that out soon after he moved from design into verification at Hewlett-Packard some years ago. The question is, "when will you be done?" At a DVClub Silicon Valley meeting...

Posted to Industry Insights (Weblog) by rgoering on Thu, Aug 18 2011
Specman: collect events and -auto_cover_events, what's the difference?

Hi, I'm using two specman commands in order to collect event coverage: collect events config cover -auto_cover_events=TRUE I don't understand what each one is doing. I checked cdnshelp but it seems they both enable the event coverage collection. Do I need them both? thanks

Posted to Functional Verification (Forum) by Tzachi Noy on Thu, Aug 18 2011
UCIS Coverage Standard -- Innovation Means Business

Open solutions are just curiosities until the ecosystem figures out how to turn them into money. Java and Linux are good examples of that. When they first hit the "open" space, they were interesting technical solutions to interoperability (Java) and breaking the proprietary operating system...

Posted to Functional Verification (Weblog) by Team MDV on Wed, Aug 17 2011
Free Webinars Explore Advanced Functional Verification Techniques

UVM, assertion-based simulation, metric-driven verification, assertion synthesis, formal scoreboarding -- these are just a few of the advanced techniques that can improve your verification productivity. To help you learn about such techniques, Cadence is offering a series of nine free one-hour webinars...

Posted to Industry Insights (Weblog) by rgoering on Mon, Aug 15 2011
Hot Topic: Should Separate Teams Handle Analog Verification?

Dedicated verification teams are well established in the digital world, but not in analog/mixed-signal design. Has the time come for separate analog verification teams? I've been following an ongoing debate on this topic in a couple of LinkedIn groups, a debate that followed my recent blog posting...

Posted to Industry Insights (Weblog) by rgoering on Thu, Jul 21 2011
Warning "coverpoint is not dumped to the coverage database because all bins are empty""

Hi, While i m running my code i got the following warnings: "cover point is not dumped to the coverage database because all bins are empty". There are ignore bins used in these cover points like: ignore_bins ib=[a:b] when i comment these ignore_bins warning wont come. Please tell me what wrong...

Posted to Functional Verification (Forum) by ThakurRajneesh on Mon, Jul 18 2011
Re: Exclude functional coverage for particular test

An excellent question, as this highlights the danger of relying on automatic coverage. In vr_ad you can constrain the has_coverage field of your vr_ad_map or vr_ad_reg_file. By default it's TRUE, but if you constrain it to FALSE then you won't get any coverage collected. So, in your test file...

Posted to Functional Verification (Forum) by StephenH on Tue, Jun 21 2011
DAC Panel: Users Describe Mixed-Signal Verification Challenges, Solutions

Should analog/mixed-signal verification be more like digital verification, with separate verification teams, a methodology like the Universal Verification Methodology (UVM), and metric-driven verification (MDV)? Yes, according to three mixed-signal engineers at a panel discussion at the Cadence EDA360...

Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 13 2011
Coverage on VAMS model

Currently which signoff criteria is used to verify the functionality of the VAMS model. Do we have any kind of coverage associated with VAMS model ?

Posted to Functional Verification (Forum) by Ashish Goel on Sun, Jun 12 2011
User View: Where e Outshines SystemVerilog For Functional Verification

Don't expect Michael Blech, a verification manager at PMC-Sierra's Fiber to the Home (FTTH) division, to switch from the Specman e verification language any time soon. A 10-year user of e , he has some strong views about the advantages of e over SystemVerilog, including language features that...

Posted to Industry Insights (Weblog) by rgoering on Mon, May 30 2011

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coverage

DVClub Talk: Software-Inspired Technique Predicts IC Verification Closure

Specman: collect events and -auto_cover_events, what's the difference?

UCIS Coverage Standard -- Innovation Means Business

Free Webinars Explore Advanced Functional Verification Techniques

Hot Topic: Should Separate Teams Handle Analog Verification?

Warning "coverpoint is not dumped to the coverage database because all bins are empty""

Re: Exclude functional coverage for particular test

DAC Panel: Users Describe Mixed-Signal Verification Challenges, Solutions

Coverage on VAMS model

User View: Where e Outshines SystemVerilog For Functional Verification