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common power format,UPF

  • Q&A: Qi Wang Updates EDA Power Intent Format Standards
    IC design teams can use one of two formats to express power intent - the Common Power Format (CPF) from the Silicon Integration Initiative ( Si2 ), or IEEE 1801 , also known as the Unified Power Format (UPF). Efforts are now underway to bring the two formats closer together, and Qi Wang, technical marketing...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 20 2013

  • What’s Cool for Low-Power at DAC?
    Low-power design promises to be a key theme of the Design Automation Conference once again! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), if you need to cover design, implementation and verification of this important subject, there's a lot to choose from at Cadence's...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 30 2012

  • Low-Power Design? Brian Bailey Gets It
    Hats off to Brian Bailey! If you haven't been following his EDA Designline Power Series on eetimes.com you have been missing out. Throughout April, he's been running a pretty comprehensive series of editorials, opinion pieces and contributed articles on the subject of low power design. As he...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 2 2012

  • Si2 Interoperability Guide V2.0 Available for Download

    Recently, the Silicon Integration Initiative (Si2) announced the availability of the Interoperability Guide for Power Format Standards V2.0 . This is an important milestone of power format interoperability between IEEE 1801-2009 and the Common Power Format (CPF). This update was triggered by the Si2's...
    Posted to Low Power (Weblog) by QiWang on Mon, Oct 31 2011

  • Cadence Low Power Guru Wins Si2’s Distinguished Service Award

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    Posted to Low Power (Weblog) by Pete Hardee on Fri, Oct 21 2011

  • Another Expert’s View on Power Intent and Hierarchy
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    Posted to Low Power (Weblog) by Pete Hardee on Wed, Sep 21 2011

  • An Expert’s View on Power Formats and Methodology
    In the last five years since the introduction of power formats, using a side file to describe power intent such as power domains, power modes and associated interface logic has become the mainstream low power design methodology. This marks great progress toward automating complex low power design techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Aug 24 2011

  • Low Power Design -- Alive and Well at DAC
    Low power design was undoubtedly one of the themes of DAC this year -- especially at the Cadence booth. We drew lively interest on the DAC floor with our low power demo station, which was continuously busy especially on the free Monday. We were showing a new demo explaining how advanced low power techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Jun 14 2011

  • A Look Behind the Si2 CPF 2.0 Release
    The long awaited new version of the Common Power Format, CPF 2.0, was released by the Silicon Integration Initiative ( Si2 ), an industry standards organization, today. Here are several interesting observations from this latest release . First of all, this new release is a big step forward for interoperability...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Feb 15 2011

  • Power-Aware Design -- Time To Move Beyond Formats
    Magma Design Automation’s recent announcement that its Talus IC implementation suite now reads and writes the Common Power Format (CPF) is a welcome move. But the real challenge of low-power design is not a question of formats – it’s about building a cohesive ESL-to-tapeout power-aware...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 4 2009
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