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cloud

How NVM Express and 12Gb/s SAS Enable the Cloud – and Why Verification IP Helps

Two emerging protocol storage standards - Non-Volatile Memory Express (NVM Express or NVMe) and 12 Gbit/second Serial Attached SCSI (SAS) - are set to play a crucial role in the future of personal and cloud computing. As a result, Cadence has announced verification IP (VIP) support for these protocols...

Posted to Industry Insights (Weblog) by rgoering on Tue, Mar 27 2012
CDNLive! – Lip-Bu Tan Keynote Cites Semiconductor Growth Drivers

CDNLive! Silicon Valley , the annual Cadence U.S. user conference, opened in San Jose, California March 13, 2012 on an optimistic yet cautionary note. Keynote speakers from Cadence, TSMC and ARM each predicted a new era of innovation in the electronics industry, but also noted daunting challenges that...

Posted to Industry Insights (Weblog) by rgoering on Tue, Mar 13 2012
Join EDA “Movers and Shakers” at IEEE EDP Symposium – Cloud, 3D-ICs, Power and More

If you want a deeper understanding of the challenges, trends, and potential new solutions for IC and systems design, there's no better place to find out than the IEEE-sponsored Electronic Design Processes Symposium (EDP) April 5-6, 2012, in Monterey, California. Now in its 19 th year, this interactive...

Posted to Industry Insights (Weblog) by rgoering on Thu, Mar 8 2012
Who Needs 40/100 Gigabit Ethernet SoCs?

Short answer: the cloud. Thanks to cloud computing and cloud applications, data centers are having to manage large data transfers in very short periods of time. System-on-chip (SoC) solutions that support 40/100 Gbit Ethernet (GbE) are now in demand, and for this reason, Cadence today (Feb. 21, 2012...

Posted to Industry Insights (Weblog) by rgoering on Tue, Feb 21 2012
ARM TechCon: Q&A With Lip-Bu Tan, Cadence CEO

What kind of collaboration does the semiconductor industry need now? How can we get more venture capital money into semiconductors? Is there a future for EDA in the cloud? These are a few of the questions asked by Simon Segars, executive vice president and general manager of ARM, of Lip-Bu Tan, president...

Posted to Industry Insights (Weblog) by rgoering on Thu, Oct 27 2011
GTC Panel: CEOs Navigate a Changing IC Ecosystem

Semiconductor and system design have never been more promising -- or more challenging. How can IC design companies find their way to sucess? At the Global Technology Conference (GTC) Aug. 30, three CEOs and one vice president gave their perspectives on the rapidly changing IC design and manufacturing...

Posted to Industry Insights (Weblog) by rgoering on Thu, Sep 1 2011
Seminar: Top 10 Essential System on Chip (SoC) Interfaces

What are the most important system on chip (SoC) interfaces that design and verification engineers need to understand? A "top ten" list presented at the August 25 Verification IP (VIP) seminar at Cadence included some old standbys and some new and emerging interface specifications. The list...

Posted to Industry Insights (Weblog) by rgoering on Sun, Aug 28 2011
DAC Panel Says “Yes” to EDA in the Cloud -- But Differs on When

Do you expect widespread EDA usage in public clouds in 3 years, 8 years, or never? That's the question that was put before attendees at a Design Automation Conference (DAC) panel June 7. But first came a spirited discussion that revealed much about the motivations, advantages, and challenges of electronic...

Posted to Industry Insights (Weblog) by rgoering on Fri, Jun 10 2011
DFM – Buy Tools or Hire Services? Cadence Offers Both for TSMC

If you're planning a 40nm or 28nm design with TSMC, you have two options for meeting design for manufacturability (DFM) requirements -- either buy EDA tools and run DFM checks, or turn to a services provider to run them for you. On May 9, Cadence became the first EDA partner to be certified by TSMC...

Posted to Industry Insights (Weblog) by rgoering on Thu, May 12 2011
EDP Workshop: Will Security Concerns Slow EDA in the Cloud?

Is public cloud computing secure enough for IC design work? Two different perspectives emerged at the IEEE Electronic Design Processes ( EDP ) workshop April 7-8, where an Intel manager detailed security concerns his company has about public clouds, and the CEO of EDA startup Physware explained why his...

Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 13 2011

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cloud

How NVM Express and 12Gb/s SAS Enable the Cloud – and Why Verification IP Helps

CDNLive! – Lip-Bu Tan Keynote Cites Semiconductor Growth Drivers

Join EDA “Movers and Shakers” at IEEE EDP Symposium – Cloud, 3D-ICs, Power and More

Who Needs 40/100 Gigabit Ethernet SoCs?

ARM TechCon: Q&A With Lip-Bu Tan, Cadence CEO

GTC Panel: CEOs Navigate a Changing IC Ecosystem

Seminar: Top 10 Essential System on Chip (SoC) Interfaces

DAC Panel Says “Yes” to EDA in the Cloud -- But Differs on When

DFM – Buy Tools or Hire Services? Cadence Offers Both for TSMC

EDP Workshop: Will Security Concerns Slow EDA in the Cloud?