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cadence,EE Times

Incisive Debug Analyzer is a Finalist for EETimes and EDN ACE Software Product of the Year

Great news.... Incisive Debug Analyzer (IDA) is one of five finalists for the EETimes/EDN Annual Creativity in Electronics (ACE) Awards in the Software Product of the Year category. In addition to IDA, Lip-Bu Tan and Cadence are also finalists for ACE Executive of the Year and Company of the Year, respectively...

Posted to Functional Verification (Weblog) by Karnane on Mon, Mar 25 2013
Cadence, ARM and TSMC Reveal 20nm Challenges and Solutions

At a recently archived EE Times webinar May 1, representatives of Cadence, ARM and TSMC noted three important points about the 20nm process node. Number one, its adoption is inevitable. Number two, the design and manufacturing challenges are significant. Number three, the challenges are manageable given...

Posted to Industry Insights (Weblog) by rgoering on Wed, May 2 2012
Webinar: Easing the Pain of FPGA-Based Prototyping

Nearly every digital system-on-chip, ASIC or ASSP is prototyped in FPGAs, most typically for pre-silicon software development and debugging. The problem is that it can take months to get the prototype up and running with a functionally equivalent design. But there are easier ways to develop FPGA-based...

Posted to Industry Insights (Weblog) by rgoering on Thu, Sep 8 2011
Panel: Is the Cloud the Solution to IC Design Collaboration?

Semiconductor design increasingly requires collaboration by geographically-dispersed design teams, as well as partners and third-party suppliers. Private or public cloud computing may provide a rich environment for this collaboration, but some key questions and challenges remain, according to panelists...

Posted to Industry Insights (Weblog) by rgoering on Thu, Jan 20 2011

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cadence,EE Times

Incisive Debug Analyzer is a Finalist for EETimes and EDN ACE Software Product of the Year

Cadence, ARM and TSMC Reveal 20nm Challenges and Solutions

Webinar: Easing the Pain of FPGA-Based Prototyping

Panel: Is the Cloud the Solution to IC Design Collaboration?