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board design

  • Re: Top layer Ground Planes

    Thanks for the info. If I want the top layer ground plane a certain distance from the non-ground throughhole pin, do I increase the anitpad dimension in "modify design padstack " menu? I want to prevent potential arcing from a signal pin to a ground plane surrounding the throughhole signal...
    Posted to PCB Design (Forum) by fvascon on Mon, Sep 30 2013
  • Top layer Ground Planes

    I am creating two ground planes on the top layer using Polygon shape, CLASS Etch, SUBCLASS-Top. I have routed the NON-ground nets on the bottom layer and left only the Ground nets for the TOP layer. Will the anitpad of the through-hole pins prevent the ground plane from connecting to the non-ground nets...
    Posted to PCB Design (Forum) by fvascon on Mon, Sep 30 2013
  • Artwork Log Message(Photoplot outline rectangle not found)

    Hello, I am getting the following message in my ViewLog file when I generate the Artwork files "Photoplot outline rectangle not found ... using drawing extents" not able to understand what exactly it means. In my board design there is no keepout area, all components extends till the edge of...
    Posted to PCB Design (Forum) by raul5565 on Tue, May 21 2013
  • About Schematic and footprints in orcad..

    hi everyone, I am new to orcad. I am designing a PCB using orcad. I put all the components in the schematic and make the connections and I create a netlist and hence the footprint. The questions are, 1) If I change any connection or component in the footprint then it should show the error indicating...
    Posted to PCB Design (Forum) by Wonderman on Mon, Nov 19 2012
  • Creating a board with different sized layers

    Sorry in advance if this is a simple question easily answered elsewhere. I am creating a PCB that needs to have different sized layers. Basically the stackup is as follows: Die LTCC Interposer routing/signal layers (dielectrics and conductors) The die has a footprint, but the LTCC and the interposer...
    Posted to PCB Design (Forum) by vandervander15 on Wed, Sep 26 2012
  • Text File Export

    I'm looking at doing EMC review work but the tools I want to use need text file exports and I don’t have a Cadence install. Is extracta available somewhere or is there another way to do this? Thanks, Chris
    Posted to PCB Design (Forum) by cdewitt on Wed, Sep 19 2012
  • Allegro PCB Designer : Interlayer Spacing ?

    Hi, I'm currently working with Cadence 16.5 and I would like to add an interlayer spacing constraint for two adjacent layers, in order to prevent interlayer crosstalk between differential pairs. I spent some hours looking for a solution, and I found this post : http://www.cadence.com/Community/forums...
    Posted to PCB Design (Forum) by mxlecanu on Thu, Jul 26 2012
  • Netlist Import Error

    Hi all, I'm new to PCB design. I managed to create netlist for a small circuit using capture. But when i imported the netlist in the board file i got an error as shown below. #1 ERROR(24) File not found Packager files not found #2 ERROR(102) Run stopped because errors were detected I'll pleased...
    Posted to PCB Design (Forum) by LALITH on Wed, Jul 25 2012
  • Component Browser: Footprint is not defined for a part.

    Hi, After creating part/symbol in Part Developer using PCB Librarian, I tried to test the part in DE HDL through PCB Librarian. When I placed the part, Component Browser shows an error, Footprint is not defined for a part. What might be the cause of this error? But when I tried to export the schematic...
    Posted to PCB Design (Forum) by maberu on Thu, Jul 19 2012
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