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  • Assertions Help Avoid Chip Melt

    When asked why the use of assertions for low power is rising, I say “at 40nm and below, the chips are just going to melt.” Ann Steffora Mutschler, you quoted me perfectly in your “ Avoiding Chip Melt ” article! Assertions are just the tip of the low-power verification iceberg...
    Posted to Low Power (Weblog) by Adam Sherilog on Thu, Mar 22 2012
  • Webinar Report: Power-Aware Mixed-Signal Verification

    Most of the discussion about low-power design techniques has focused on digital circuits. However, nearly all systems-on-chip (SoCs) are mixed-signal, and the way in which analog and digital circuitry interact has a huge impact on overall power consumption. Thus, low power (or "power aware"...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jan 25 2012
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