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analog/mixed-signal,UVM 1.0

  • DVCon Wrap-Up and Blog Review

    The DVCon conference, held Feb. 28-March 3 in San Jose, Calif., was by all appearances a success this year. Major events were well attended and the program had a lot of interesting content. While the Universal Verification Methodology (UVM) was a major focus, this year's program made it clear that...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Mar 10 2011
  • UVM-MS – Metric-Driven Verification for Analog IP and Mixed-Signal SoCs

    Metric-driven verification and constrained-random stimulus generation have greatly eased digital functional verification, but have rarely been applied to analog IP or mixed-signal SoCs. That may change with a proposed methodology called Universal Verification Methodology-Mixed Signal (UVM-MS), which...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Feb 10 2011
  • EDA Retrospective: Ten Key Developments in 2010

    Much happened in the world of EDA and electronic design in 2010, and this year-end blog post provides a quick summary of ten developments I thought were particularly notable. Some received considerable publicity, while others were hardly noticed. The list below does not include any product announcements...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Dec 27 2010
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