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advanced node,DFM

  • “In Design” DFM Signoff – the Inside Story

    As noted in a recent customer announcement with Fujitsu, Cadence offers "in design" design for manufacturability (DFM) signoff for digital, mixed-signal and custom IC design. The basic idea is simple - engineers run signoff DFM checks during the physical design process, instead of waiting until...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 5 2011
  • How DRC Plus Makes DFM Easy at 28nm

    Design for manufacturability (DFM) requirements have been a barrier for many design teams who are thinking about moving to lower process nodes. But can DFM actually get easier as process nodes shrink? That possibility is offered by DRC Plus (DRC+), a new technology developed by GLOBALFOUNDRIES in collaboration...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Oct 25 2010
  • Advanced Node Panel: Making The Case For Restricted Design Rules

    You would think that designers would not welcome restrictions on what they do, but panelists at the recent Design Automation Conference saw restricted design rules (RDRs) as a helpful and necessary step towards 32 nm/28 nm IC design. Panelists from AMD , TSMC , Texas Instruments , and Cadence spoke Monday...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Aug 6 2009
  • Cadence: Committed to DFM

    On June 10, Cadence issued a press release that mentioned “…decreasing the level of investment in the manufacturing side of DFM” as part of restructuring activities. Since that announcement, some in the press and analyst community have published their interpretations of the actions...
    Posted to Digital Implementation (Weblog) by mchacko on Fri, Jun 19 2009
  • 45 nm Is Turning Point For Model-Based DFM

    A recent decision by TSMC to require model-based design for manufacturability (DFM) checks at 45/40 nm may push DFM into more widespread use. It’s coming too late for the several dozen DFM startups that were around a few years ago, but it could have a significant impact on IC design flows going...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 4 2009
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