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Virtuoso,mixed-signal

Cadence Has Significant Presence in ARM TechCon 2012 and Worldwide ARM Technical Symposiums

The recently concluded ARM TechCon 2012 , the annual event for ARM users (including hardware and software engineers) along with ARM ecosystem partners, was a huge success. Once again, this event showcased the excellent Cadence-ARM partnership that's helping to bring next generation electronic designs...

Posted to Mixed-Signal Design (Weblog) by Sathish Bala on Wed, Nov 14 2012
Transitioning Your LEF-Based EDI System Design Flow to OpenAccess

The trend of combining analog and digital circuits on a single chip has been growing for several years. More recently I'm seeing more and more designers improve their productivity by transitioning their designs to Open Access (OA) and taking advantage of the interoperability between Virtuoso and...

Posted to Digital Implementation (Weblog) by wally1 on Mon, Nov 12 2012
Press Release About TSMC Flow, Blog from ARM Validate Cadence’s Mixed-Signal and 20nm Leadership

A press release and a blog post caught my attention this week (October 15, 2012), and they have clearly demonstrated Cadence's leadership in 20nm process nodes and mixed-signal solutions. The press release is titled " TSMC Selects Cadence Virtuoso and Encounter Platforms for its 20nm Design...

Posted to Mixed-Signal Design (Weblog) by Sathish Bala on Fri, Oct 19 2012
Panel: Mixed-Signal Designers Reveal “Gaps” and Solutions

Are we closing the gaps in mixed-signal design? That question was posed to five panelists, including three Cadence customer representatives, at the Mixed-Signal Technology Summit held at Cadence Sept. 20, 2012. While panelists noted progress in mixed-signal design tools and flows, they pointed to a number...

Posted to Industry Insights (Weblog) by rgoering on Mon, Oct 1 2012
Digital Logic in Analog Block – How Will You Test It?

Analog IP blocks these days have increasing amounts of digital control logic. With very small amounts of digital logic, it's possible to just draw gates on the schematic and run targeted tests that will hopefully catch any errors. But when you have several thousand digital gates, a new approach is...

Posted to Industry Insights (Weblog) by rgoering on Mon, Sep 10 2012
Designer View – Automating Analog Design with Intent Capture

Analog design is almost entirely a manual effort, and that needs to change, according to Pierluigi Daglio, analog verification engineer at STMicroelectronics. In a recorded presentation at the Cadence web site, Daglio shows how analog/mixed-signal constraint capture and propagation can be automated,...

Posted to Industry Insights (Weblog) by rgoering on Wed, Aug 15 2012
Tech-On-Tour: Bringing Advanced Mixed-Signal Design Methodology from Concepts to Reality

About a year ago, Cadence offered a worldwide Tech-On-Tour (ToT) series for mixed-signal designs. One main objective of this seminar series is to bring the awareness of the need for a design methodology change to the broad mixed-signal designer community worldwide. The event was very successful and you...

Posted to Mixed-Signal Design (Weblog) by QiWang on Tue, Jun 19 2012
Managing Inherited Connections with CPF in Virtuoso

Let's assume you are managing a schematic-driven top level design in Virtuoso and you want to import a digital block Verilog netlist into Virtuoso. This is a very common use model in mixed-signal implementation. While the Layout Database is saved in Open Access (OA), the optimized Verilog netlist...

Posted to Mixed-Signal Design (Weblog) by AndreasLenz on Wed, May 23 2012
A Quick Tutorial on Managing ECOs Using Pcells in Mixed Signal Designs

The purpose for creating a Pcell is to automate the creation of data. Pcells should be designed as standalone entities, independent of the environment in which they are created and independent of the variety of environments in which you or someone else might want to use them. An environment can react...

Posted to Mixed-Signal Design (Weblog) by paragb on Wed, May 16 2012
Learn How to Do Mixed-Signal Design at CDNLive! Silicon Valley

With the theme of Connect, Share and Inspire, this year's CDNLive! Silicon Valley March 13-14, 2012 will be an exciting forum for Cadence customers to share their most recent chip design successes and learn from each other. Among close to 100 presentations during the packed two day agenda, one area...

Posted to Mixed-Signal Design (Weblog) by QiWang on Wed, Mar 7 2012

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Virtuoso,mixed-signal