Home > Community > Tags > Virtuoso
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Virtuoso

  • An Efficient and Fast Verification Flow for Analog Designs Validation using Virtuoso SpectreMDL

    The emergence of sub-micron technologies has enabled today’s designers to include various digital/analog/RF components in a single chip. The complexity of validating such designs has highlighted the necessity for a robust validation methodology and for an appropriate process for running efficient...
    Posted to Custom IC Design (Weblog) by helenet on Mon, May 4 2009
  • Porting EDA Applications To Multicore -- Part 2

    As noted in part one of this blog series, porting the Encounter Digital Implementation System (EDI) to multicore platforms was a challenging task. That’s no less true for Cadence’s efforts to parallelize the Virtuoso Spectre Circuit Simulator, although the challenges were somewhat different...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 30 2009
  • Getting a Feel for RF

    It was a delight when I read the blog by Bill Schweber of TechOnline's RF DesignLine titled “ Getting some basic RF experience ”. I was surprising pleased that somebody took the time to talk about how one might get the feel for RF. That is because what Bob talks about is more or less...
    Posted to Custom IC Design (Weblog) by TomC on Wed, Apr 29 2009
  • Porting EDA Applications To Multicore -- Part 1

    The EDA industry is gearing up for what may be its largest retooling ever – retrofitting or rewriting applications to run on next-generation multicore platforms. An inside look at how Cadence ported the Encounter Digital Implementation System (EDI) to parallel processing illustrates some of the...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Apr 28 2009
  • OpenAccess, Its Just a Database…

    I suspect that in another year we’ll all stop talking about OpenAccess (OA) like it is something special and treat it the way it should be, that it is just another database. Having said that, I know I’m going to get plenty of email about my portrayal of OA from colleagues and others but that...
    Posted to Custom IC Design (Weblog) by TomC on Mon, Apr 20 2009
  • Virtuoso, the SATs, and the Dark Knight - Part II

    Well, are you still wondering what Virtuoso has to do with the SATs and The Dark Knight ? Well, thanks for indulging me, I hope the suspense wasn’t too much to bear! As I mentioned in part 1 , if you had taken the January 2009 SAT test, again, like my daughter did, you had this as one of your essay...
    Posted to Custom IC Design (Weblog) by mrkelly on Mon, Apr 6 2009
  • What’s all the Hoopla with PDKs?

    At a purely technical level, Process Design Kits are fairly innocuous. They are used to enable custom IC design flows. A Process Design Kit (PDK) includes device models, schematic symbols, netlisting procedures and parameterizable cell layout generators. Physical verification rule decks and a parasitic...
    Posted to Custom IC Design (Weblog) by Robin Sarma on Tue, Mar 31 2009
  • Analog Design Validation: What is Your Recipe for Success?

    Every analog circuit design goes through some kind of electrical validation step before release to manufacture. The depth and breadth of this testing depend on the design itself, the end application and of course that all important deadline. When it comes to custom design, there is also an individual...
    Posted to Custom IC Design (Weblog) by Nigel on Tue, Mar 31 2009
  • Virtuoso, the SATs, and The Dark Knight - Part I

    You are probably wondering what Virtuoso has to do with the SATs and The Dark Knight. Well, first of all, it has only been in the past few years (so this, obviously isn’t something I’ve had to do!), but today's high school students now have to answer essay questions on the SAT test, in...
    Posted to Custom IC Design (Weblog) by mrkelly on Mon, Mar 30 2009
  • Automated Digital Block Implementation Using Virtuoso

    Have you ever found yourself laying out a digital block in Virtuoso where you have so many standard cells to place and route that you wish you could use an automated tool to place and route those cells? Maybe you even at one point considered using a Big-Digital P&R tool like Encounter Digital Implementation...
    Posted to Custom IC Design (Weblog) by LayoutWolf on Fri, Mar 27 2009
Page 29 of 30 (299 items) « First ... < Previous 26 27 28 29 30 Next >