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Virtuoso

  • Exceed On Demand And Virtuoso IC6.1

    Many of our customers use our Virtuoso software in combination with the windows emulation product from OpenText named "Exceed on Demand". To maximize performance between the two tools, we have some recommendations: For IC6.1.4 and Exceed on Demand 7 , these setting will cause problems between...
    Posted to Custom IC Design (Weblog) by NewYorkSteve on Mon, Mar 22 2010
  • SystemC AMS – A New Proposal For Mixed-Signal Verification

    In an effort driven by European semiconductor companies and universities, the Open SystemC Initiative ( OSCI ) last week announced the first version of the SystemC analog/mixed-signal language standard, AMS 1.0. Since Cadence is the industry leader in mixed-signal design and verification, and is strongly...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Mar 18 2010
  • deleting simple mosaics with skill

    icfb 5141 I'm looping though layout instances and deleting vias that point to the wrong techfie. I'm using dbDeleteObject( d_object) to delete these via's. Everything was working smoothly until I ran across a layout that uses simple mosaics. I get this warning message: *WARNING* You can't...
    Posted to Custom IC Design (Forum) by isgdude on Tue, Mar 16 2010
  • Antenna Error in Calibre DRC but Passed antenna check in Encounter

    Dear Experts, I am using encounter to do my place and route after having obtain the macro lef from the abstract generator, everything's going fine until i stream out my gds2 file and check the DRC using Calibre in virtuoso, where i am getting hundreds of antenna error out of the antenna check. I...
    Posted to Digital Implementation (Forum) by mingfatty on Tue, Mar 16 2010
  • Bringing MEMS Design To The Mainstream

    Micro-electrical mechanical systems ( MEMS ) have been around for years, and have found their way into high-volume applications such as automobile air bag controllers, GPS systems, and inkjet print heads. But MEMS devices such as accelerometers, gyroscopes, RF switches and pressure sensors are not as...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Mar 15 2010
  • problem with category in library manager when add instance

    hi, there i am running ic5141 with RHEL4 box. the day before yesterday,it worked all right. but yesterday when i create a new cell under my own library attacted to a IBM_PDK, i found that when i press "i" to add instance and select a item in the category box, there is nothing appear in the...
    Posted to Custom IC Design (Forum) by minci on Fri, Mar 12 2010
  • Things You Didn't Know About Virtuoso: IC 6.1.4 ADE Enhancements

    I'm not going to beat around the bush here. I could tell you about all the things that are new in ADE (Analog Design Environment) in IC 6.1.4. I could tell you about the fact that the individual subwindows are now resizeable, rearrangeable (is that a word?), undockable and tabbable (I know that's...
    Posted to Custom IC Design (Weblog) by stacyw on Wed, Mar 10 2010
  • Disappearing geometry

    I have a pCell where contacts are repeated as the width increases - pitch = 12 .0 repeats = (wu + 4.0)/12.0 This works as expected for all widths EXCEPT the default, minimum, width in the CDF which is 8.0. When "wu" is 8.0, the contact disappears. If I make the CDF default 7.0 then the contact...
    Posted to Custom IC Design (Forum) by Dean1138 on Thu, Mar 4 2010
  • Things You Didn't Know About Virtuoso: Thumbnails

    Boy, you must think we're a few sandwiches short of a picnic over here at Cadence. A couple of months ago we came out with this great new Virtuoso software release (IC 6.1.4) . So, despite my best efforts to get you to use the recently-opened files list or to create bookmarks , the first thing you...
    Posted to Custom IC Design (Weblog) by stacyw on Wed, Mar 3 2010
  • CIW > File > Import > Verilog... fails to create schematics (portOrder property?)

    Hello I try importing the final verilog (.v) file generated by SoC encounter so I can do LVS for a mixed signal design, but ihdl.exe doesn't generate schematics. The beginning of the log file says (scgp is the digital library name in icfb): @(#)$CDS: ihdl.exe version 5.1.0 12/16/2007 23:32 (cicln04...
    Posted to Custom IC Design (Forum) by skylerweaver on Fri, Feb 12 2010
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