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How Hardware/Software Co-Development Fuels “Product Creation”
I've written recently about "product creation," a concept that looks beyond the chip or board and considers the requirements of the entire end product, including hardware, software applications, and mechanical enclosures. These requirements ripple down through the design supply chain and...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Apr 3 2013
System to Silicon Verification – CDNLive Gives a Reality Check on How Hardware and Software Meet
Ever since switching from being a hardware/software chip developer to being an enabler with tools in EDA and embedded software, I was part of a team working towards methodologies and tools to improve the interaction of hardware and software. In December last year -- 15 years in -- I summarized a great...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Fri, Mar 8 2013
Securing Invisible Things … or “Why Denial Works!”
The opening keynote of the Embedded World conference in Germany left me with chills. No, it was not a grand theatrical performance letting me crave for more. It simply scared the bejevies out of me with respect to the safety and security of embedded devices, some of which I use each day. Luckily -- as...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Wed, Feb 27 2013
Embedded World 2013: Virtual Platforms Connected to Everything
Sometimes it is hard to explain why certain ideas take off and why others don’t. There are many stories of poor products that are more successful than much better products. There are also many stories about products that struggle in one time or place, but the same thing is a big hit at another...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Fri, Feb 22 2013
System Design 2012 – Real Users Achieving Real Results!
This morning the final success story my team has been working on for this year went live. Texas Instruments reports on how they achieved greater than 90% accurate correlation between an architectural power estimation and actual silicon! This deserves its own blog early next year, but meanwhile, it has...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Fri, Dec 21 2012
Update to the Linux Kernel Message System
A few months ago I wrote an Introduction to the Linux Kernel Message System . As with all software, especially Linux, things get out of date and need updating. The Linux 3.5 kernel contained changes to the kernel message system that are relevant to my previous article. I found coverage of the changes...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Fri, Dec 7 2012
Optimizing ARM Based Designs for Low Power using Emulation
The month November goes to the Brits, no question. Not only did the James Bond movie Skyfall open, but Santa Clara also experienced somewhat of a "British Invasion" for ARM TechCon in the Santa Clara convention center. To be there properly I even brought out my favorite new pin striped suit...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Mon, Nov 19 2012
How Many Cycles are Needed to Verify ARM’s big.LITTLE on Palladium XP?
At the recent CDNLive! India user conference, Deepak Venkatesan and Murtaza Johar representing ARM India gave a fascinating presentation called "Verifying big.LITTLE using the Palladium XP". Registered Cadence.com users can get the presentation here once the proceedings are published. ARM's...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Tue, Oct 30 2012
Ubuntu 12.10 on a Virtual Platform at ARM Techcon
Next week (Oct. 30-Nov. 1) ARM TechCon 2012 is at the Santa Clara Convention Center. As always, Cadence will be at the conference and exhibit, but I would like to especially recommend one paper for people interested in embedded Linux and Virtual Platforms. The presentation is Analysis of Software-Driven...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Thu, Oct 25 2012
Q&A: Phil Bishop, New Cadence VP, Drives Adoption of System-Level Design
Phil Bishop has come into his new role - Vice President and General Manager of System Level Design at Cadence - at an exciting time. After years of slow growth, technologies such as high-level synthesis and virtual prototyping are seeing adoption and showing results in more and more production environments...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Oct 8 2012
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