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System-Level Design and the Waves of EDA
Before January comes to an end it is time for my annual flashback and brief reflection on where we are in system-level design, and a look at how the state of today compares to the predictions we made 10 years ago. 2011 was an interesting year for system-level design. In May Cadence announced its participation...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Mon, Jan 30 2012
Ubuntu Updates for 2012
I'm overdue to provide an update on how to run Virtual System Platform (VSP) and Incisive on the latest version of Ubuntu . My last article was very helpful to many people and users provided additional insight about what worked for them. Just before the holiday break we delivered our latest version...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Mon, Jan 2 2012
Will Software Development Cause Another “Industrial” Revolution?
As you have read here before, Cadence has been working closely with Xilinx to create an extensible virtual prototype for the Zynq extensible platform . I have previously written about the need and value for extending virtual platforms at the transaction level . According to the Xilinx Zynq website the...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Mon, Nov 21 2011
Do You Have a DATE with Software? Cadence Does!
How important is the software market to Cadence and as an element of the EDA360 vision? Important enough that Cadence is sponsoring several relevant sessions at the upcoming Design, Automation, and Test in Europe (DATE) conference in Grenoble, March 14-18, 2011. If you're anywhere near Grenoble in...
Posted to
System Design and Verification
(Weblog)
by
Steve Brown
on Mon, Feb 28 2011
The Increasing Role of SystemC in System Design
Today's post is less technical and a bit more theoretical, but I promise that my next post will be more hands-on. As somebody working on virtual platforms in an EDA company, I regularly spend time talking to firmware and embedded software engineers with many different backgrounds. Every so often...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Tue, Feb 22 2011
System Realization Webinars in 2010 -- A Summary
Last year was unprecedented for Cadence. We came up with the EDA360 vision , reorganized internally to align to that vision, and established some great partnerships to help our customers realize their own visions around EDA360. The ED360 vision paper has been well received by both customers and competition...
Posted to
System Design and Verification
(Weblog)
by
MayankBhatia
on Fri, Jan 7 2011
System Industry Trends - 2010 Highlights and What's Coming Up for 2011 (Part II)
2010 was a very dynamic year for the electronic systems industry overall and Cadence in particular. In this set of blogs, I discuss some of the trends that started in 2010 and will continue in 2011. In part I, I talked about the key growth market, key industry challenges and the role of EDA. In this...
Posted to
System Design and Verification
(Weblog)
by
Ran Avinun
on Tue, Dec 28 2010
System Industry Trends - 2010 Highlights and What's Coming Up for 2011 (Part 1)
2010 was a very dynamic year for the electronic systems industry overall, and for Cadence in particular. In the next couple of blogs, I would like to focus on some of the trends that started in 2010 and will continue in 2011. In this blog (part I), I will talk about the key growth markets, key industry...
Posted to
System Design and Verification
(Weblog)
by
Ran Avinun
on Thu, Dec 16 2010
Inside The Virtual File System
As part of my ongoing effort to report and explain interesting topics related to Virtual Platforms, I have published a new article on the ARM DS-5 Virtual File System over at blogs.arm.com . Please head over and take a look to find out more about how Virtual File Systems work. Many thanks to the team...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Thu, Aug 19 2010
Android System Verification Part 1
From time to time I hear or read stories about how engineers find ways to apply Specman to verification problems that are outside of normal RTL verification. Often times they are about connecting Specman to a post-silicon environment such as a physical board. There are probably many of them, but a quick...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Mon, Nov 9 2009
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