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VIP

  • EDA360 Is More Than Design IP Plus Software Drivers

    I checked my Linked-In messages the other day and saw a survey by Girish Patil with the provocative question "Is EDA360 the same experiment that Phoenix Technology tried a decade ago with the acquisition of Virtual Chips and Sand Micro?" Well, that was an interesting link between my past professional...
    Posted to Functional Verification (Weblog) by tomacadence on Thu, May 27 2010
  • The Future of OVM, VMM, and UVM

    In my last blog , I took a look back at the history of how we got to the first delivery of UVM. Now, let's take a look forward. Over the past week since UVM was released, and Cadence opened the UVMWorld portal to support the new UVM Community and ecosystem, I have seen a number of customers asking...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, May 24 2010
  • UVM World Community Site Now Available!

    Yesterday morning, the verification world was buzzing with the first release of the Universal Verification Methodology (UVM) standard library and documentation from Accellera. This represents a major milestone for Accellera as well as for the EDA industry, since it is the first time that all the major...
    Posted to Functional Verification (Weblog) by tomacadence on Tue, May 18 2010
  • Initial Release of the UVM Now Available!

    As Richard Goering just reported , the Accellera VIP Technical Subcommittee (TSC) this morning posted the first release of the Universal Verification Methodology (UVM), tagged "1.0 Early Adopter" since there is a bit of new technology beyond the OVM 2.1.1 baseline. This is great news for the...
    Posted to Functional Verification (Weblog) by tomacadence on Mon, May 17 2010
  • UVM 1.0 EA Is Available – What This Means To You

    A milestone in functional IC verification was reached today (May 17, 2010) as Accellera released the Universal Verification Methodology (UVM) version 1.0 EA ("early adopter") to the verification community. Here's some background on how this happened, why it's important, and how it impacts...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 17 2010
  • Inside Cadence: Training for EDA360

    Over the past few weeks all of Cadence's Verification and Systems Solutions Applications Engineers (AEs), Services Engineers, and many Customer Support staff, have been brought together for detailed methodology and product training. The objectives of this ambitious undertaking are to bring their...
    Posted to Functional Verification (Weblog) by jvh3 on Thu, May 6 2010
  • Open Integration Platform – Redefining “Silicon” IP

    One of the most interesting features of the Cadence Open Integration Platform , introduced May 5 at the CDNLive! EMEA conference, is that it offers a new view of how silicon IP should be provided. In fact, the term "silicon IP" may have to be revised, because we're now talking about an...
    Posted to Industry Insights (Weblog) by rgoering on Thu, May 6 2010
  • What Does EDA360 Mean for Verification Engineers?

    I trust that most of you have seen the recent flurry of blog posts and articles about the new Cadence " EDA360 " vision. I was working on a blog entry on how this links to my world of verification when I saw my colleague Jack Erikson post " What Does EDA360 Mean for Logic Designers? "...
    Posted to Functional Verification (Weblog) by tomacadence on Mon, May 3 2010
  • Presentation: Rethinking Software-as-a-Service For EDA

    One of the more startling statements at the recent Electronic Design Processes (EDP) workshop came in a presentation from James Colgan, CEO of Xuropa . At one point he appeared to be saying that software-as-a-service ( SaaS ) is not the right model for EDA, at least not for quite some time. But Xuropa...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 21 2010
  • ARM AMBA 4 Protocol And VIP – A Closer Look

    ARM last week announced the first phase of its AMBA 4 specification, and Cadence simultaneously released Incisive verification IP (VIP) for the e language and SystemVerilog. So why is ARM releasing AMBA 4, what's in the two phases, and what's in the VIP? To get a closer look at what's in...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 17 2010
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