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UVM,methodology

  • UVM Testflow Phase Debugging- Identifying Blocking Activities

    UVM Testflow debugging capabilities have been recently enhanced through the addition of more information to the output of the show domain command. In this post, we demonstrate how this information can be used to answer such questions as 1. What domains are in the environment? What units do they contain...
    Posted to Functional Verification (Weblog) by teamspecman on Mon, Jul 16 2012
  • Guest Blog: What UVM Needs to Succeed

    The Universal Verification Methodology (UVM) is a big step forward for verification IP interoperability, but it needs to be embraced as part of a bigger, broader, people-centric definition of methodology, according to Neil Johnson, principal consultant at Cadence partner and design services provider...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 21 2011
  • Video: Update on AMIQ’s DVT IDE and UVM 1.0 at DVCon 2011

    The UVM 1.0 release was the big story of DVCon 2011, as it's the first verification methodology officially supported by all three of the "Big 3" simulation vendors. However, the very nature of the standard -- an open source library governed by a community similar in character to Linux itself...
    Posted to Functional Verification (Weblog) by jvh3 on Wed, Apr 6 2011
  • Celebrating the UVM 1.0 Release, or the Gadfly Eats a Little Crow

    As I hope you have all seen by now, Accellera has announced the official production release of the Universal Verification Methodology (UVM) 1.0 standard. My colleagues Richard Goering , Stan Krolikoski and Adam Sherer have already blogged about the release and its contents so I'll refer you to their...
    Posted to Functional Verification (Weblog) by tomacadence on Tue, Feb 22 2011
  • Specman, e, and EDA360

    The EDA industry is all abuzz over the new vision paper "EDA360 - The Way Forward for Electronic Design" ; and for good reason - in 2010 the electronics world is finally starting to transform in ways that have been long anticipated by Specmaniacs and our "Trailblazer" program partners...
    Posted to Functional Verification (Weblog) by teamspecman on Tue, Jun 8 2010
  • The Future of OVM, VMM, and UVM

    In my last blog , I took a look back at the history of how we got to the first delivery of UVM. Now, let's take a look forward. Over the past week since UVM was released, and Cadence opened the UVMWorld portal to support the new UVM Community and ecosystem, I have seen a number of customers asking...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, May 24 2010
  • DVCon 2010 Rocked!

    I've spent much of this week at the San Jose Doubletree Hotel for DVCon 2010 , and I have to say that it was a really good show. This is arguably the most important conference of the year for verification. DAC is lots bigger of course, but DVCon is really focused and there's a core group of colleagues...
    Posted to Functional Verification (Weblog) by tomacadence on Fri, Feb 26 2010
  • An Analogy: UVM Is To OVM As SystemVerilog Is To Verilog

    In my last blog entry , I implored Accellera to release UVM 1.0 quickly, standardizing OVM 2.1 as is, with full backwards compatibility and without trying to cram overlapping functionaity from VMM into the base. Then they can add new functionality on top of this base, taking good ideas from OVM World...
    Posted to Functional Verification (Weblog) by tomacadence on Fri, Feb 5 2010
  • Why UVM Does Not Equal OVM Plus VMM

    In the numerous tweets, blog posts, and online forum discussions on the upcoming Universal Verification Methodology (UVM) standard from Accellera, I have seen a couple of references along the lines of "UVM=OVM+VMM" and that really concerns me. It concerns me because it's not accurate, but...
    Posted to Functional Verification (Weblog) by tomacadence on Wed, Jan 27 2010
  • Happy Holidays - OVM on The Path to Standardization

    I've just heard that the Accellera VIP Technical Subcommittee (TSC) has voted to make the OVM the base for their Universal Verification Methodology (UVM) standard and, in spite of the holidays, I’m so happy that I have to blog about it. When Cadence and Mentor embarked upon the Open Verification...
    Posted to Functional Verification (Weblog) by tomacadence on Wed, Dec 23 2009
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