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  • UVM - 10 Years in the Making ...

    In case you the missed the news today, the Accellera VIP TSC released the first version of the Universal Verification Methodology (UVM). This represents a significant achievement on the part of the TSC as it is the first standard SystemVerilog Base-Class Library and Methodology. While there has been...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, May 17 2010
  • Initial Release of the UVM Now Available!

    As Richard Goering just reported , the Accellera VIP Technical Subcommittee (TSC) this morning posted the first release of the Universal Verification Methodology (UVM), tagged "1.0 Early Adopter" since there is a bit of new technology beyond the OVM 2.1.1 baseline. This is great news for the...
    Posted to Functional Verification (Weblog) by tomacadence on Mon, May 17 2010
  • UVM 1.0 EA Is Available – What This Means To You

    A milestone in functional IC verification was reached today (May 17, 2010) as Accellera released the Universal Verification Methodology (UVM) version 1.0 EA ("early adopter") to the verification community. Here's some background on how this happened, why it's important, and how it impacts...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 17 2010
  • What Does EDA360 Mean for Verification Engineers?

    I trust that most of you have seen the recent flurry of blog posts and articles about the new Cadence " EDA360 " vision. I was working on a blog entry on how this links to my world of verification when I saw my colleague Jack Erikson post " What Does EDA360 Mean for Logic Designers? "...
    Posted to Functional Verification (Weblog) by tomacadence on Mon, May 3 2010
  • UVM Based on OVM 2.1.1: What a Great Idea!

    Regular readers know that I have been urging the Accellera VIP TSC to base its Universal Verification Methodology (UVM) on the OVM 2.1 release rather than on OVM 2.0.3 as voted back in December. A few readers took me to task for my shameless advocacy, suggesting that I shut up and "let the committee...
    Posted to Functional Verification (Weblog) by tomacadence on Wed, Apr 21 2010
  • Tweeting From a Standards Meeting: Good or Bad?

    In my last blog entry , I mentioned that I was able to keep up with a lot of the discussion going on at a recent Accellera TSC meeting just by reading the tweets from the participants. That experience got me thinking about how much social media has changed the nature of such meetings, and the consequences...
    Posted to Functional Verification (Weblog) by tomacadence on Thu, Mar 25 2010
  • UVM = OVM 2.1: Even Better!

    Since I'm not a member of the Accellera VIP TSC, I did not attend the 2.5-day face-to-face meeting held last week in Massachusetts. But with the steady stream of tweets coming from several of those who did attend, I almost felt as if I were there. That experience will be subject of my next blog entry...
    Posted to Functional Verification (Weblog) by tomacadence on Tue, Mar 16 2010
  • DVCon 2010 Rocked!

    I've spent much of this week at the San Jose Doubletree Hotel for DVCon 2010 , and I have to say that it was a really good show. This is arguably the most important conference of the year for verification. DAC is lots bigger of course, but DVCon is really focused and there's a core group of colleagues...
    Posted to Functional Verification (Weblog) by tomacadence on Fri, Feb 26 2010
  • DVCon 2010 - Day 1

    Click here or on the image below to go to the photo blog of DVCon Day 1. While I've added descriptive captions to the images, allow me to address the FAQ: "How was the traffic on show floor?". My unscientific observation was that the floor was a little lighter than last year, but this was...
    Posted to Functional Verification (Weblog) by jvh3 on Wed, Feb 24 2010
  • Editor For OVM Field Registration Macros

    The OVM SystemVerilog Class Library has built-in automation for many service routines that classes need for printing, copying, comparing and so on. OVM allows you to specify the automation needed for each field and to use a built-in, mature and consistent implementation of these routines. For each field...
    Posted to Functional Verification (Weblog) by Team genIES on Mon, Feb 22 2010
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