	Login with a Cadence account.
Not a member yet? Create a permanent login account to make interactions with Cadence more conveniennt. Register \| Membership benefits

Get email delivery of the Cadence blog (individual posts).

Popular Tags

Browse All Tags

Email
Social Web

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Send yourself a copy

Cadence RSS Feeds

Intro copy of the newsletter section here, some intro copy of the newsletter. Instruction of how to subscribe to this newsletter.

Contact Us

Cadence Contacts

Global Office Locator
Find Offices worldwide »

Sales Inquiry
Request for Product information »
Cadence Channel Partners »

Corporate Headquarters
Cadence Design Systems, Inc.
2655 Seely Avenue
San Jose, CA 95134
Phone: 408.943.1234

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Send Yourself A Copy

Testbench simulation

UVM e (IEEE 1647) Video Series Features the Return of the Cowbell!

A significant number of readers of my previous post on this topic were not aware of the Saturday Night Live cowbell skit. This took me quite by surprise! The only prescription for this problem is that I pledge to continue to play the cultural ambassador and will introduce more vital trivia! However,...

Posted to Functional Verification (Weblog) by Axel Scherer on Mon, May 21 2012
UVM SystemVerilog Video Series Brings Verification World "More Cowbell!"

To quote an American pop culture catchphrase made famous by Saturday Night Live character Bruce Dickison , "I gotta have more cowbell !" In the world of functional verification this translates to "more collateral!" Thererfore, we have released a set of byte-size videos about the basics...

Posted to Functional Verification (Weblog) by Axel Scherer on Thu, May 3 2012
Analyzing Error Reports When Specman Crashes

One of the most frustrating events while running a tool would be to experience a tool crash. In Specman you would usually see something like: *** Error: OS signal 11 (segmentation violation) received See the stack trace in ./specman.err To debug: --------- o Rerun the same test with the same seed in...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Apr 17 2012
If Only Carl Friedrich Gauss had IntelliGen in 1850

The N-queens issue is a challenging but standard puzzle when it comes to the world of constraint solving. It's a generalization of the 8-queens puzzle, whose description can be found in detail in Wikipedia ( http://en.wikipedia.org/wiki/Eight_queens_puzzle .) The challenge is to place N queens on...

Posted to Functional Verification (Weblog) by teamspecman on Thu, Aug 18 2011
Specman/e Users Voice Their Opinions on Benefits of e over SystemVerilog

A recent customer blog interview with Geoffrey Faurie from ST Microelectronics and Richard Goering from Cadence was posted on Cadence.com with the title: " Is e or SystemVerilog Best for Constrained-Random Verification? " This blog post has received much positive feedback from other Specman...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Jan 18 2011
Achieve the Next Level of Verification Productivity with Specman Advanced Option

Advanced verification customers are seeing their verification environments getting more and more complex requiring millions of lines of code spread across hundreds, even thousands of files that are re-used from Block --> SoC --> System level. Today's design under test (DUT) can be extremely...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Jan 18 2011
Performance Tips and Tricks: Another Specman Performance Series

Building on the great success of Efrat Shneydor's previous blog series, Performance-Aware e Coding Guidelines, a new "Specman Performance Handbook" was added to the 9.2 release of Specman Elite that included, on top of the previous blog items, a slew of other important tips and techniques...

Posted to Functional Verification (Weblog) by teamspecman on Mon, Aug 23 2010
e Templates: A Nifty Way To Create Reusable Code

Hi All, An e template (known as a parameterized type in other programming languages) is a feature that has been around for several releases and can be a great way of creating re-usable code. Templates can be used anywhere a user would like to create a single re-useable object that might operate on different...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Aug 10 2010
New UVM Book Is For You And U But Not Ewe

A Practical Guide to Adopting the Universal Verification Methodology (UVM) is the first book published on the emerging Accellera UVM . Written by the main authors of the user guide in the UVM release, this book provides more details and extends the methodology to address system level challenges. Unlike...

Posted to Functional Verification (Weblog) by Adam Sherilog on Wed, Jul 21 2010
Have You Considered e Lately?

Richard Goering's recent interview with Mitch Weaver on the future of Specman and e put me in a reflective mood about my own evolving opinions. My hands-on experience with Specman is minimal; back in my 0-In applications days I co-developed a joint demo with Verisity (prior to acquisition by Cadence...

Posted to Functional Verification (Weblog) by tomacadence on Fri, Mar 5 2010

Page 1 of 3 (28 items) 1 2 3 Next >

Popular Tags

Share

Subscribe

Contact Us

Testbench simulation

UVM e (IEEE 1647) Video Series Features the Return of the Cowbell!

UVM SystemVerilog Video Series Brings Verification World "More Cowbell!"

Analyzing Error Reports When Specman Crashes

If Only Carl Friedrich Gauss had IntelliGen in 1850

Specman/e Users Voice Their Opinions on Benefits of e over SystemVerilog

Achieve the Next Level of Verification Productivity with Specman Advanced Option

Performance Tips and Tricks: Another Specman Performance Series

e Templates: A Nifty Way To Create Reusable Code

New UVM Book Is For You And U But Not Ewe

Have You Considered e Lately?