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Tensilica

How Hardware/Software Co-Development Fuels “Product Creation”

I've written recently about "product creation," a concept that looks beyond the chip or board and considers the requirements of the entire end product, including hardware, software applications, and mechanical enclosures. These requirements ripple down through the design supply chain and...

Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 3 2013
EDA CEOs Reveal Thoughts About Present and Future of EDA Industry

At an EDA Consortium ( EDAC ) panel discussion March 14, 2013, top executives from Cadence, Mentor, Synopsys, ARM, and EDA startup Nimbus shared their views about a range of business and technology issues facing the EDA industry. Panelists engaged in lively discussions about topics including consolidation...

Posted to Industry Insights (Weblog) by rgoering on Mon, Mar 18 2013
Why Cadence Agreed to Acquire Tensilica – And How It Can Change SoC Design

On March 11, 2013, Cadence announced an agreement to acquire Tensilica, a successful provider and market leader in dataplane processing IP. By providing a more complete solution for system-on-chip (SoC) design, the acquisition will facilitate a new generation of highly differentiated, low-power, high...

Posted to Industry Insights (Weblog) by rgoering on Sun, Mar 17 2013
Martin Lund CDNLive Keynote: Why SoCs Need “Application Optimized” IP

Systems on chip (SoCs) are incredibly varied, extremely complex, and based on rapidly changing requirements and specifications, according to Martin Lund, senior vice president for R&D at the Cadence SoC Realization Group. At a keynote speech at the CDNLive Silicon Valley conference March 12, 2013...

Posted to Industry Insights (Weblog) by rgoering on Thu, Mar 14 2013
Lip-Bu Tan at CDNLive 2013: Opportunities and Challenges for Electronics, and How Cadence Can Help

Lip-Bu Tan, Cadence president and CEO, is excited about ongoing innovation within the electronics industry - but he's also aware of challenges such as advanced node lithography, complexity, time-to-market, and rising design costs. In a keynote speech at the CDNLive Silicon Valley conference March...

Posted to Industry Insights (Weblog) by rgoering on Tue, Mar 12 2013
Virtual Divide and Conquer Enables Fixed Sub-Systems

The 17 th North American SystemC User Group meeting ( NASCUG ), will take place this coming Monday (Feb. 27, 2012) at the DoubleTree Hotel in San Jose, CA. I am on the agenda with a presentation called "Extending Fixed Sub-systems at the TLM Level - Experiences from the FPGA World", in which...

Posted to System Design and Verification (Weblog) by fschirrmeister on Thu, Feb 23 2012
Panel Discussion: Applying High-Level Synthesis in an SoC Flow

Last Thursday, EETimes hosted a virtual System on Chip event focused on IP integration in SoCs. Even with IP re-use comprising a large percentage of new SoCs, new IP must also be developed in order to differentiate on the hardware side. With RTL containing so much application-specific implementation...

Posted to System Design and Verification (Weblog) by Jack Erickson on Mon, May 16 2011
Panelists: “Designer of Future” Needs New Hardware, Software Skills

There's been much talk about the tools and methodologies needed for next-generation electronic systems design, but not so much about the people behind them. The people side of system-level design became clearer at a DesignCon panel titled "Who is the Designer of the Future?" One conclusion...

Posted to Industry Insights (Weblog) by rgoering on Sun, Feb 6 2011

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Tensilica

How Hardware/Software Co-Development Fuels “Product Creation”

EDA CEOs Reveal Thoughts About Present and Future of EDA Industry

Why Cadence Agreed to Acquire Tensilica – And How It Can Change SoC Design

Martin Lund CDNLive Keynote: Why SoCs Need “Application Optimized” IP

Lip-Bu Tan at CDNLive 2013: Opportunities and Challenges for Electronics, and How Cadence Can Help

Virtual Divide and Conquer Enables Fixed Sub-Systems

Panel Discussion: Applying High-Level Synthesis in an SoC Flow

Panelists: “Designer of Future” Needs New Hardware, Software Skills