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TSVs

  • EDA Retrospective: Ten Key Developments in 2010

    Much happened in the world of EDA and electronic design in 2010, and this year-end blog post provides a quick summary of ten developments I thought were particularly notable. Some received considerable publicity, while others were hardly noticed. The list below does not include any product announcements...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Dec 27 2010
  • Whitepaper: 3D ICs Pose Design Challenges, But No “Showstoppers”

    3D ICs with through-silicon vias (TSVs) promise tremendous power, cost, and size advantages, but they also generate a lot of concern about what's required in terms of design flows, skills, and tools. A new Cadence whitepaper ( click here to read ) sets the record straight by taking a balanced look...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Dec 7 2010
  • 3D IC Standards – First, Let’s Define Our Terms

    There's a lot of interest in 3D ICs these days, but there are many challenges to solve before 3D IC design can move into the mainstream. One challenge is the establishment of standards for design, modeling, and manufacturability. But the starting point is likely to be something even simpler - a dictionary...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 10 2010
  • A Qualcomm Perspective on 3D ICs

    3D integration is a promising new technology that can potentially save space and power by stacking die in 3 dimensions. I recently spoke with Riko Radojcic, Qualcomm design lead for TSS (Through Silicon Stacking – Qualcomm’s term for 3D ICs), about how Qualcomm is deploying this technology...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 20 2009
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