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DAC 2013 -- Kaufman Winner Hu: FinFETs Will Serve Analog Design Very Well
AUSTIN, Texas--The father of the FinFET, who spent a career "attacking the barriers to Moore's Law," says the technology is going to surprise people when it comes to its utility for analog designs. Chenming Hu, TSMC Chair Professor at U.C. Berkeley, in accepting the 2013 EDAC Phil Kaufman...
Posted to
The Fuller View
(Weblog)
by
Brian Fuller
on Sun, Jun 2 2013
TSMC 2013 Symposium: Progress in 20nm, 16nm FinFET, and 3D-IC Technologies
The TSMC 2013 Technology Symposium , held April 9 in San Jose, California, brought good news for anyone interested in advanced node or 3D-IC technologies. Keynote speakers noted excellent yields and significant progress in 20nm planar, 16nm FinFET, and Chip-on-Wafer-on-Substrate (CoWoS) technologies...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Apr 14 2013
Cadence Cosmic Circuits Acquisition – Analog/Mixed Signal IP for Advanced Node SoCs
Last week (Feb. 7, 2013) Cadence announced an agreement to acquire Cosmic Circuits Private Limited, a leading provider of analog/mixed-signal IP based in Bangalore, India. Here's some background on this relatively young, fast-growing company, and how its offerings fit into the growing Cadence design...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Feb 11 2013
TSMC Forum: An Update on 20nm, 3D-IC, and 16nm FinFETs
TSMC, the world's largest semiconductor foundry, is thinking big when it comes to next-generation process technology. At the TSMC Open Innovation Platform (OIP) Ecosystem Forum Oct. 16, TSMC described reference flows for 20nm and for multi-die integration, and revealed that ARM and TSMC are working...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Oct 17 2012
ARM TechCon Address: High Stakes at Low Process Nodes
The complexity of advanced-node IC designs is skyrocketing, and the demands on EDA tool development seem overwhelming - but innovation and deep collaboration will break through the challenges, according to Chi-Ping Hsu, senior vice president for R&D at the Silicon Realization group at Cadence. In...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Oct 25 2011
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