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The Internet of Things – the Next Growth Driver, Enabled by High-Level Synthesis?
The electronics industry has enjoyed constant growth while undergoing constant transformation. One of the most significant transformations has been the source of that growth -- from the PC revolution, to the rise of the internet, to mobile computing. The consensus is that the next growth driver is going...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Tue, May 14 2013
High-Level Design and Verification: How Can We Finally Move on From the Forrest Gump Era?
Richard Goering wrote an excellent summary of the DAC panel "High Level Synthesis Deployment: Are We Ready?," which can be found here . His conclusion is that we are getting close, and one of the biggest hurdles still to overcome is the skill set -- the combination of hardware design expertise...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Tue, Jun 26 2012
High-Level Synthesis Users: Productivity Gains Beckon, But Learning Curve Comes First
SystemC-based high-level synthesis (HLS) tools have greatly improved in recent years and are undergoing adoption by many large semiconductor companies. But to get high productivity out of HLS, current RTL designers will first face a learning curve, according to panelists at the recent Design Automation...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Jun 25 2012
DAC 2012 Panel – Can One System Model Serve Everybody?
Can one system model ever serve the needs of system architects, hardware developers, software developers, and verification teams? Probably not, according to panelists at the Design Automation Conference (DAC 2012) June 5. But panelists had some informative perspectives on the various types of models...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Jun 5 2012
TLM Design and Verification: What to See at DAC This Year
If you are attending the Design Automation Conference ( DAC 2012 ) June 4-7 in San Francisco and you are interested in SystemC/TLM driven design and verification, including high-level synthesis, there are a lot of interesting sessions. First, there is a parallel conference going on Saturday and Sunday...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Thu, May 31 2012
Is System Modeling the Next EDA Abstraction Level?
According to a recent talk by Frank Schirrmeister, group director of product marketing for the Cadence System and Software Realization Group, the answer is "yes." System modeling is a level of abstraction that's independent from hardware and software implementation. But there are some interesting...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Apr 15 2012
Q&A: Frank Schirrmeister Updates Status of System-Level Design
Frank Schirrmeister, group director of product marketing for the Cadence System and Software Realization Group, has been managing and marketing system-level design technology for over 15 years. He's a widely published and respected author on the topic, with a monthly blog at the Chip Design Magazine...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Jan 22 2012
TLM: The Year in Review, and Trends for 2012
2011 was my first full year in the land of Transaction-Level Modeling (TLM) design and verification, after spending my entire career to that point in RTL. I made my move upward in abstraction level in mid-2010 because it seemed like the time had finally come for this methodology to start becoming mainstream...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Mon, Jan 2 2012
IP Cannot be an Efficient Abstraction Level Without SystemC!
EDN recently featured a lengthy article entitled " SOCs: IP is the new abstraction. Reusable IP, not system-level language, has become the new level of abstraction ." The point of view is that SoC design now is such a large undertaking that the best way to efficiently design one is to assemble...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Fri, Aug 12 2011
Q&A: Linking Virtual Prototypes to High-Level Synthesis
Virtual prototypes for early software development and high-level synthesis tools for hardware implementation are two important new technologies that are raising the abstraction level in electronic systems design. But these tools are traditionally isolated from one another because they require different...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jun 29 2011
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