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TLM,ESL

TLM-driven Design And Verification Methodology Book Author Interviews

The recently published TLM-driven Design and Verification Methodology book has been an immediate hit, receiving critical acclaim. The authors each labored and reveled in the creation process. To give you a little insight into each author's perspective they've shared some of their thoughts about...

Posted to System Design and Verification (Weblog) by Steve Brown on Fri, Aug 6 2010
System Realization Alliance -- An Industry Collaboration

System Realization is a very broad topic. It encompasses all aspects of system design, from chips to chassis. In particular, innovations in software are driving changes in the value chain, as highlighted in the EDA360 industry vision document . In order to foster industry innovation and ease customer...

Posted to System Design and Verification (Weblog) by Steve Brown on Wed, Jul 21 2010
Brian Bailey: Building Towards A Cohesive ESL Flow

Plenty of niche tools fall under the electronic system level (ESL) label, but putting them together into a cohesive flow has been elusive. At the recent Design Automation Conference, consultant Brian Bailey (and blogger at techbites.com ) described how he's been working with Cadence on a flow that...

Posted to Industry Insights (Weblog) by rgoering on Tue, Jul 6 2010
What Language Is Best For High Level Synthesis?

I was not expecting the last panel on the last day of the Design Automation Conference to be well attended, but it was - along with animated discussions and a long line of audience members waiting to ask questions. It turns out that a lot of people were interested in the panel's title: "What...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 30 2010
Making an EDA360 System Realization Investment Through Standards Support

Cadence is a sponsor of the Open SystemC Initiative (OSCI) standards organization. We are providing finanical and leadership resources to facilitate the creation and promotion of standards for system development. We continue to invest in OSCI and its activities because we believe in its importance, and...

Posted to System Design and Verification (Weblog) by Steve Brown on Thu, Jun 3 2010
DVCon "Day 0" - Quick Report From SystemC Day

If you were looking for more evidence that the transition from RTL to ESL is gaining momentum, today at "Day 0" of DVCon (a/k/a "SystemC Day") you would discover plenty of supporting data points. Here is a brief video interview with my colleague Steve Svoboda on the day's events...

Posted to Functional Verification (Weblog) by jvh3 on Mon, Feb 22 2010
Methodology Is Important But Language Matters - Part 1

Historical trends in languages Many of us have traveled around the world, and while we can often communicate with local people in our own language, we realize it is best to communicate using the local language. It helps to "break the ice" if you at least try to use some of the local language...

Posted to System Design and Verification (Weblog) by Ran Avinun on Tue, Jan 26 2010
Formalizing Multilanguage Mixology For e Users

Historically it’s been very common for e users to have to mix other programming languages with their e verification environment. Some examples include adding C or C++ reference models, contributing e Universal Verification Components (UVCs) to non- e testbenches, or even interfacing to Matlab models...

Posted to Functional Verification (Weblog) by teamspecman on Thu, Dec 24 2009
Verification Productivity Is Holding Back Electronic System Level Development Advances

There is a controversy brewing in our industry, and I'm about to step into it boldly. I don't expect to end the controversy, since it is about the definition of a three letter acronym. And we all know how much the EDA industry likes to create and debate TLAs! The confusion makes it difficult...

Posted to System Design and Verification (Weblog) by Steve Brown on Mon, Nov 30 2009
Synopsys’ “Synphony” Announcement – Welcome to the Party!

I’m glad Synopsys realized the world really IS moving to the next higher level of abstraction above RTL and now the party can really get started! It’s great for RTL designers, for their companies, and the EDA industry. With the huge productivity boost that'll come from working at a higher...

Posted to System Design and Verification (Weblog) by SteveSvoboda on Wed, Oct 14 2009

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TLM,ESL

TLM-driven Design And Verification Methodology Book Author Interviews

System Realization Alliance -- An Industry Collaboration

Brian Bailey: Building Towards A Cohesive ESL Flow

What Language Is Best For High Level Synthesis?

Making an EDA360 System Realization Investment Through Standards Support

DVCon "Day 0" - Quick Report From SystemC Day

Methodology Is Important But Language Matters - Part 1

Formalizing Multilanguage Mixology For e Users

Verification Productivity Is Holding Back Electronic System Level Development Advances

Synopsys’ “Synphony” Announcement – Welcome to the Party!