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Q&A: A Closer Look at the Cadence Virtual System Platform
Cadence took a significant step into a new marketplace with the recent introduction of the Virtual System Platform , a virtual prototyping environment that supports architectural-level, pre-RTL software development and debugging. The Virtual System Platform is part of the tightly integrated System Development...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, May 25 2011
Q&A: Hardware/Software Integration Challenges Demand System Realization Solutions
Hardware/software integration has become a major bottleneck in electronic design flows, according to Michał Siwiński, group director of System Realization product marketing at Cadence. It's also a major requirement for System Realization, described in the EDA360 vision paper as the creation of electronics...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, May 19 2011
Is System-Level Design Creating a New Class of Engineer?
The move to electronic system level (ESL) technologies such as virtual prototyping is well underway - but what's the impact on the engineering organization? A recent panel discussion and an industry note published by analyst Gary Smith both suggested that new engineering roles are evolving, and several...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Apr 7 2011
At DVCon 2011 Next Week
Next week my colleagues and I will be at DVCon 2011 in force, ready to regale you with technical papers, panels, and techtorials covering the full range of functional, assertion-based, mixed-signal, and transaction-level verification topics. If you are within a tank of gas or a Southwest flight of San...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Fri, Feb 25 2011
IEEE SystemC Standard Revision – Here’s What to Expect
Standards are living, evolving entities, and SystemC -- standardized in 2005 as IEEE 1666 -- is no exception. This language, which has become indispensable for virtual platforms, high-level synthesis, and transaction-level modeling (TLM) design and verification, is undergoing a new revision this year...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Feb 9 2011
EDA Retrospective: Ten Key Developments in 2010
Much happened in the world of EDA and electronic design in 2010, and this year-end blog post provides a quick summary of ten developments I thought were particularly notable. Some received considerable publicity, while others were hardly noticed. The list below does not include any product announcements...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Dec 27 2010
EDA Standards Review and Forecast, Part 1 – Accellera and IEEE
Given increasing design complexity and skyrocketing costs, EDA standards have never been more important. As noted in the EDA360 vision paper , a standards-based ecosystem is absolutely essential if we're going to design the hardware and software that's needed to support tomorrow's creative...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Dec 20 2010
Q&A: How CoFluent Eases Creation of SystemC Models
SystemC transaction-level models (TLMs) are great for architectural exploration, but what do you do if you don't have all the models you need? CoFluent Design , a Cadence System Realization Alliance partner, offers an alternative with CoFluent Studio, a product that automatically generates SystemC...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Dec 15 2010
CircuitSutra Q&A – What It Takes To Develop SystemC TLM Models
SystemC transaction-level models greatly speed design and verification, but they're not easy to develop. CircuitSutra (Noida, India) is a Cadence System Realization Alliance partner that provides SystemC modeling services for virtual platforms, high-level synthesis, and verification. In this interview...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Sep 9 2010
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