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Top Ten Cadence Community Blog Posts of 2011
Over 430 Cadence Community blog posts appeared in 2011, in categories including Industry Insights, Functional Verification, PCB Design, System Design & Verification, Custom IC, Digital Implementation, RF, Mixed Signal, and Low Power. By looking at the most widely-read posts, we can get a picture...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Jan 1 2012
ARM TechCon Paper: Using a Virtual Platform for Multi-Core Software Development
You may have heard that "virtual platforms" enable software development and debugging before system hardware is available. But how do you build them, how do you solve common problems, and how do you debug software and hardware for multi-core systems? These questions and more were answered in...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Nov 21 2011
Virtual Flash Memory Gets Real
This week's Flash Memory summit will not only highlight the IP Cadence delivers, but will touch on innovative application of virtual prototype technology for Flash Memory firmware and system development. Developing complex memory controllers is challenging, and an increasing portion of the capability...
Posted to
System Design and Verification
(Weblog)
by
Steve Brown
on Mon, Aug 8 2011
Creating SystemC TLM-2.0 Peripheral Models
Over two years ago, I made some experiments and raised some requirements for an effective Virtual Platform IP authoring tool. Even with the passage of time, some people seem to find it useful as I regularly get questions about it. It is more than time to give you an update, and the good news is that...
Posted to
System Design and Verification
(Weblog)
by
TeamESL
on Thu, Jul 14 2011
Video: Duolog at DAC 2011 Update – Automating Design and Verification IP Integration
One of the key tenants of the EDA360 vision is the need for scalable, correct-by-construction IP creation and integration of design and verification IP. Duolog is in the vanguard of creating automation to address this challenge, and in this video update Duolog's CTO Dave Murray notes new capabilities...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Sun, Jun 26 2011
Pre-RTL Software Development -- You Can't Get Your Product to Market Without It!
It's been an exciting month for the System Realization team with the announcement of our System Development Suite . One of the new products, the Cadence Virtual System Platform , made its debut at the Embedded Systems Conference and has generated a lot of interest from our customers. DAC is right...
Posted to
System Design and Verification
(Weblog)
by
Steve Brown
on Mon, May 23 2011
Building Open Virtual Platforms - Bridging the Gap of Model Availability
Virtual prototypes promise to enable early software development, shorten system bring-up time, and provide a resulting increase in revenue. One of the key barriers that project teams face when considering use of virtual prototypes is the "missing model syndrome" -- essentially the lack of adequate...
Posted to
System Design and Verification
(Weblog)
by
Steve Brown
on Wed, May 4 2011
TLM 2.0, UVM 1.0 and Functional Verification
The DVCon 2011 conference was held this week and the Accellera Universal Verification Methodology (UVM) 1.0 release is breaking records in term of interest and attendance. UVM 1.0 is a big deal(!) The core functionality is solid and ready for deployment. Accellera held a full day tutorial on UVM 1.0...
Posted to
Functional Verification
(Weblog)
by
Sharon
on Mon, Mar 7 2011
System Realization Webinars in 2010 -- A Summary
Last year was unprecedented for Cadence. We came up with the EDA360 vision , reorganized internally to align to that vision, and established some great partnerships to help our customers realize their own visions around EDA360. The ED360 vision paper has been well received by both customers and competition...
Posted to
System Design and Verification
(Weblog)
by
MayankBhatia
on Fri, Jan 7 2011
A SystemC TLM 2.0 ARM Linux Boot Loader
Earlier this year I wrote an article with some details related to loading Linux into memory for Virtual Platform execution. I reviewed a problem related to Ubuntu on qemu for the ARM Versatile Platform. At Cadence, we are strong believers in standards, and for Virtual Platforms one of the key standards...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Wed, Dec 8 2010
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