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SystemC

Open-Source SystemC Library, Simulator Provide Insights Into New IEEE 1666 Standard

There is no better way to learn about the IEEE 1666-2011 SystemC standard than to use it - and the Accellera Systems Initiative has provided an easy way to do that with version 2.3.0 of its SystemC open-source "proof of concept" library. This free offering makes it possible to create SystemC...

Posted to Industry Insights (Weblog) by rgoering on Thu, Jul 19 2012
User View: Combining Virtual Platforms, Emulation, and Hardware Prototypes

Chuck Cruse, team lead for emulation and FPGA-based prototyping at LSI Corp., wants to build a "deterministic" flow including virtual platforms, emulation, and hardware prototypes. In a recorded audio presentation at the Cadence web site, he describes the challenges he's experienced and...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jul 18 2012
Adding Xilinx C Models to the Virtual Platform of the Zynq-7000 EPP

Today, I have a good article from Henry Von Bank of Posedge Software related to Zynq. Previously, I posted two articles involving Henry including an interview and a HOWTO about verification and virtual platforms. This time Henry covers an often asked topic related to the virtual platform for the Xilinx...

Posted to System Design and Verification (Weblog) by jasona on Mon, Jul 9 2012
C-to-Silicon Japan User Group and Ikegami Production Experience

We have been seeing some rapid growth in adoption of C-to-Silicon Compiler high-level synthesis. Given that it is a new way of doing design, we have been holding user local groups to get customers together with Cadence people to share experiences, information, and ideas so that we can all benefit. We...

Posted to System Design and Verification (Weblog) by Jack Erickson on Tue, Jul 3 2012
SystemC TLM-2.0 Virtual Platform Direct Memory Interface (DMI) Performance Impact

One of the most interesting concepts in SystemC TLM-2.0 is the concept of Direct Memory Interface (DMI). I remember when Mentor Graphics introduced Seamless back in the mid-1990's. Many users were impressed with how fast it could run embedded software. Of course, things have changed a lot in the...

Posted to System Design and Verification (Weblog) by jasona on Fri, Jun 29 2012
High-Level Design and Verification: How Can We Finally Move on From the Forrest Gump Era?

Richard Goering wrote an excellent summary of the DAC panel "High Level Synthesis Deployment: Are We Ready?," which can be found here . His conclusion is that we are getting close, and one of the biggest hurdles still to overcome is the skill set -- the combination of hardware design expertise...

Posted to System Design and Verification (Weblog) by Jack Erickson on Tue, Jun 26 2012
High-Level Synthesis Users: Productivity Gains Beckon, But Learning Curve Comes First

SystemC-based high-level synthesis (HLS) tools have greatly improved in recent years and are undergoing adoption by many large semiconductor companies. But to get high productivity out of HLS, current RTL designers will first face a learning curve, according to panelists at the recent Design Automation...

Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 25 2012
Re: CtoS Example Fails

Hi rradhakr Thank you for your reply. Best Regards Ahmad Obeid

Posted to Hardware/Software Co-Development, Verification and Integration (Forum) by Ahmad Obeid on Wed, Jun 20 2012
ncsc fails when using C++11 constructs

The GCC version (4.4) that ships with IUS 10.2 (GCC 4.1 is also available) has some C++11 support in it. Using -std=gnu++0x option (-std=c++0x fails due to some ieee header files), the normal C++ compiles work fine, but the NCSC compile fails to even parse those constructs. We are passing -COMPILER g...

Posted to Hardware/Software Co-Development, Verification and Integration (Forum) by brandonp on Tue, Jun 19 2012
Re: Linking the library doesn't work properly at co-verification

I am able to fix it by compiling the SystemC model files (work_dut_sc) into the loading dynamic object ( work_sc itself) at final elaboration. Like, in the irun command, there is a option -loadsc which takes the final linked object to be loaded. So i compiled into the same object and able to simulate...

Posted to Hardware/Software Co-Development, Verification and Integration (Forum) by Coverification on Tue, Jun 19 2012

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SystemC

Open-Source SystemC Library, Simulator Provide Insights Into New IEEE 1666 Standard

User View: Combining Virtual Platforms, Emulation, and Hardware Prototypes

Adding Xilinx C Models to the Virtual Platform of the Zynq-7000 EPP

C-to-Silicon Japan User Group and Ikegami Production Experience

SystemC TLM-2.0 Virtual Platform Direct Memory Interface (DMI) Performance Impact

High-Level Design and Verification: How Can We Finally Move on From the Forrest Gump Era?

High-Level Synthesis Users: Productivity Gains Beckon, But Learning Curve Comes First

Re: CtoS Example Fails

ncsc fails when using C++11 constructs

Re: Linking the library doesn't work properly at co-verification