Home > Community > Tags > System Design and Verification/C-to-Silicon Compiler/Hardware_2F00_software co-verification
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

System Design and Verification,C-to-Silicon Compiler,Hardware/software co-verification

  • New Blog series- Team ESL

    Cadence is well known for its leadership in system verification leveraging its HW-assisted verification market segment. Last year, we have expanded this segment offering, combined it with our System Software capabilities (focusing on Electronic System Level - ESL) into a larger segment - System Design...
    Posted to System Design and Verification (Weblog) by Ran Avinun on Fri, Feb 13 2009
  • Power Aware Design Now at System Level

    Several years ago, I have purchased a cell phone with a 2 years contract from one of the major wireless service providers in the US. The battery lifetime between charges of this phone was terrible - 24 hours. The service provider promised me that there will be a firmware upgrade which will improve the...
    Posted to System Design and Verification (Weblog) by Ran Avinun on Mon, Oct 6 2008
Page 1 of 1 (2 items)