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Symbol

  • Associating multiple symbols with one package

    Much like there are two symbols available for a resistor -- horizontal and vertical -- I have a second symbol for a part that I want to associate with the same package that already has one symbol associated with it. I have successfully created the symbol, but it is orphaned . . . it has no associated...
    Posted to PCB Design (Forum) by MEQueen on Wed, Apr 16 2014
  • omit / ignore parts in a BOM(BOM_IGNORE?), also label as "do not stuff" automatically in BOM

    I've looked at several forms/user guides/help documents and I'm unable to find the answers I'm looking for. I'm using orcad capture 16.2. I do *not* have CIS :'( 1. Is there a straightforward way to keep schematic compenonts off of the BOM. e.g. a PCB pad, fiducials, etc. EDIT: I'm...
    Posted to PCB Design (Forum) by cobcra on Tue, Dec 3 2013
  • Updating Part (Schematic Symbol) in Design Entry HDL

    Hi, I'm using Project Manager - Design Entry HDL in creating schematic diagram. I placed a diode symbol in the schematic diagram. After awhile, the diode symbol was modified (Pack_Type was added in the properties) in the PCB Librarian - Part Developer. How can I update the diode symbol in my schematic...
    Posted to PCB Design (Forum) by maberu on Thu, Jul 11 2013
  • Annotate veriloga or verilogams value on symbol

    Hi, I am interested in creating a symbol in Cadence which will have a label on it which is the value of a variable inside the verilog-a code of that block after a simulation has run. For instance, I have a "real" ron and I would like it's dc value to appear on my symbol. Thank you! Aaron
    Posted to Custom IC SKILL (Forum) by acook on Wed, Jul 10 2013
  • What's Good About FSP’s Schematic Generation? 16.6 Has Many New Enhancements!

    The 16.6 release of Allegro FPGA System Planner (FSP) has MANY new enhancements in the area of schematic generation. Some of the highlights: Rules file can be added via the Component Browser as Real Interfaces FPGAs can be linked to corporate symbols/footprints Virtual Interfaces can be converted to...
    Posted to PCB Design (Weblog) by Jerry GenPart on Tue, Jul 9 2013
  • Show Global Pins in Schematic Symbol / Snap to Grid

    In Part Developer under the PCB Librarian XL license, I'd like to create a schematic symbol (for TI ADS1299) with a a few logical pins (AVDD as an example) connected to multiple physical pins. I also want that logical pin to show on the schematic. Making the logical pin global hides it from the schematic...
    Posted to PCB Design (Forum) by nuengine on Fri, Jun 7 2013
  • Need to place a pin on the symbol for an internal VerilogA signal

    I have an internal signal in my VerilogA code that is passed to another module, and it is not on this module's port list. But when netlisting, it complains that it wants a pin on the symbol for that signal. So my temporary solution is just to place it on the symbol and then as a no-connect on a schematic...
    Posted to Custom IC Design (Forum) by boast on Tue, May 7 2013
  • Assigning net name to schematic symbol terminals

    Hi, Is it possible to assign net name to the symbol term in the schematic through skill without creating wire(wire stub) from the terminal? Thanks, Eduard Raines
    Posted to Custom IC SKILL (Forum) by Eduard Raines on Wed, Jan 30 2013
  • schViewToView

    Hi all, I want to write a skill file to update standard cell librarie all symbols with VDD/VSS pins. There exits all symbol view. When I use the "schViewToView()" function, I want to select the "Modify" function. How could I do the job automatically? Thanks for your great help! Best...
    Posted to Custom IC SKILL (Forum) by geeknerd on Mon, Dec 24 2012
  • How to associate footprint and symbol

    Hello, I have to create a new component, and I knew how to do that with Orcad 10, but now I have the new 16.3 version and I'm lost... I've create a new symbol part with Orcad capture and a new footprint using Orcad pcb editor. Now, how can I link them? The help file is huge and I couldn't...
    Posted to PCB Design (Forum) by C3PO on Tue, Oct 16 2012
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