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SpectreRF,Cadence

  • Impedance measurement

    Sir/Madam, I have been designing a Differential drive rectiifer for UHF passive RFID in 130nm CMOS process. As the design of rectifier completes I got stuck with the impedance measurement, i.e. for finding input impedance of rectifier using Cadence Virtuoso. As it is a non-linear circuit which simulation...
    Posted to RF Design (Forum) by Jithin on Mon, May 12 2014
  • Issue with Envelope analysis

    Hi, I am simulating the I/Q upconversion using port through envelope analysis. The I input pwl file has samples of a cosine of frequency=5MHz and timestep=0.00125us. The Q input pwl file has samples of value=0 and timestep=0.00125us. The original I, Q pwl files have data upto 2ms. I have attached the...
    Posted to RF Design (Forum) by AparnaG on Sat, Mar 8 2014
  • (IC6.1.5.500.12) ADE L messing up sim results(result access). Anyone familiar with that?

    Dear All, I've done extensive searching on forum for this, in vain. However, I am sure that someone else came across this, and maybe my search keywords weren't appropriate. If you know of thread relating to this, please point me to it. From time to time I get the those symptoms (they might all...
    Posted to RF Design (Forum) by ChrisXB on Fri, Jul 19 2013
  • 25 Years of Innovation at Cadence – 25 Key Milestones

    Cadence is celebrating its 25 th anniversary in 2013, and there's a long history of innovation to celebrate. We'll be highlighting some of that history over the next 12 months in blogs, videos, and other media. In this post, I'll point to some of the key contributions that Cadence brought...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jul 17 2013
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