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Specman,eRM,Coverage-Driven Verification,OVM e

  • UVM - 10 Years in the Making ...

    In case you the missed the news today, the Accellera VIP TSC released the first version of the Universal Verification Methodology (UVM). This represents a significant achievement on the part of the TSC as it is the first standard SystemVerilog Base-Class Library and Methodology. While there has been...
    Posted to Functional Verification (Weblog) by mstellfox on Mon, May 17 2010
  • Yikes - Synopsys is Following Me!

    No, I'm not being paranoid -- Synopsys, my largest competitor, is literally following me: Before discoursing on this unusually public display of affection, allow me to take a step back and announce that I've started to tweet on Twitter . While initially put off by the apparent solipsism embedded...
    Posted to Functional Verification (Weblog) by jvh3 on Mon, Jun 29 2009
  • New e / Specman Workshops Available Now

    In response to the continual growth in the e /Specman user community, Team Specman has put together 3 new workshops that are included with the Incisive 8.2 SOCV Kit that shipped just last week. (Plus: to ensure the content stays fresh, the "plan of record" for these workshops is to continually...
    Posted to Functional Verification (Weblog) by teamspecman on Wed, Dec 10 2008
  • New Blog - All About e & Specman

    End-users of e , Specman, Incisive Enterprise Simulator (IES), e RM/OVM e , and loyal Specmaniacs in general: have we got the blog for you! As part of Cadence's commitment to support IEEE 1647 e , Team Specman is launching this blog to serve up technical tips, tricks, examples, and observations about...
    Posted to Functional Verification (Weblog) by teamspecman on Wed, Dec 10 2008
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