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Specman,e language,AOP

DVCon 2013 for the Specmaniac

At the upcoming DVCon (in San Jose, CA February 25-28) , Cadence will cover all aspects of our verification technologies and methodologies (full list of Cadence-sponsored events is here ). Of course, Team Specman cannot resist drawing your attention to the many activities that will feature Specman and...

Posted to Functional Verification (Weblog) by teamspecman on Thu, Feb 7 2013
What Does it Take to Migrate from e to UVMe?

So you are developing your verification environment in e , and like everyone else, you've been hearing a lot of buzz surrounding UVM (Universal Verification Methodology). Maybe you would also like to give it a try. The first question that pops in your mind is, "What would it take to migrate...

Posted to Functional Verification (Weblog) by teamspecman on Wed, Sep 5 2012
Analyzing Error Reports When Specman Crashes

One of the most frustrating events while running a tool would be to experience a tool crash. In Specman you would usually see something like: *** Error: OS signal 11 (segmentation violation) received See the stack trace in ./specman.err To debug: --------- o Rerun the same test with the same seed in...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Apr 17 2012
Technical Tip on How to Use HDL Assertions in e

While assertion callbacks have existed in Specman/e for several years now, several questions on their usage have surfaced recently, so here is a short refresher on their usage. ABV (Assertion Based Verification) is, more and more, becoming an important aspect of any complete verification. HDL assertions...

Posted to Functional Verification (Weblog) by teamspecman on Wed, Sep 28 2011
Full Sequence Coverage in a Single Line of e Code?

I was asked recently about how to easily collect coverage on the sequences generated by the verification environment. Since this question has come up before, I thought I would take this opportunity to write a short blog on how to quickly and easily collect coverage on generated sequences. A comprehensive...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Jun 28 2011
Specman Application Note: Improving Verification Productivity With Dynamic Load and Reseeding

Are you looking for new approaches to improve your verification productivity by 40 - 60%? Look no further... read the technical application note by Corey Goss on how to Improve Verification Productivity through Adopting Dynamic Load and Reseed Methodology. Attached is a link to the application note that...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Mar 1 2011
Specman/e Users Voice Their Opinions on Benefits of e over SystemVerilog

A recent customer blog interview with Geoffrey Faurie from ST Microelectronics and Richard Goering from Cadence was posted on Cadence.com with the title: " Is e or SystemVerilog Best for Constrained-Random Verification? " This blog post has received much positive feedback from other Specman...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Jan 18 2011
Achieve the Next Level of Verification Productivity with Specman Advanced Option

Advanced verification customers are seeing their verification environments getting more and more complex requiring millions of lines of code spread across hundreds, even thousands of files that are re-used from Block --> SoC --> System level. Today's design under test (DUT) can be extremely...

Posted to Functional Verification (Weblog) by teamspecman on Tue, Jan 18 2011
My Reason For Choosing e – a Much More Advanced Verification Language. What’s Your Reason?

I'd like to share with you a story from many, many, many moons ago when I first evaluated e as a potential verification language solution for the company I was working for. At the time, our verification group was using the basic Verilog behavioural constructs for verification (memories to represent...

Posted to Functional Verification (Weblog) by teamspecman on Wed, Jan 12 2011

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Specman,e language,AOP

DVCon 2013 for the Specmaniac

What Does it Take to Migrate from e to UVMe?

Analyzing Error Reports When Specman Crashes

Technical Tip on How to Use HDL Assertions in e

Full Sequence Coverage in a Single Line of e Code?

Specman Application Note: Improving Verification Productivity With Dynamic Load and Reseeding

Specman/e Users Voice Their Opinions on Benefits of e over SystemVerilog

Achieve the Next Level of Verification Productivity with Specman Advanced Option

My Reason For Choosing e – a Much More Advanced Verification Language. What’s Your Reason?