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SoC

  • Moving Past The Missing Model Syndrome

    One of the issues that has hindered the progress of using Virtual Platforms for early software development is missing models. I recall seeing Axys Design's Maxsim tool back around 2001 and thinking how cool it was. All the user had to do was drag and drop models and wire them together to create a...
    Posted to System Design and Verification (Weblog) by jasona on Thu, Feb 18 2010
  • IBM/Cadence Collaboration Points To “Next Generation” EDA

    Embedded software development and hardware/software integration have become primary bottlenecks for system-on-chip (SoC) projects. Still, most EDA tools remain exclusively focused on hardware design, while software development tools have no understanding of hardware. A collaborative solution developed...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Feb 8 2010
  • DesignCon Panel: “Total” IP Solutions Fuel SoC Integration

    Panelists at DesignCon Feb. 3 agreed that just shipping RTL code for silicon IP is far from sufficient. But what comprises a “total” IP solution for SoC integration? That’s a little more complicated, and it fueled a good discussion with panelists from Arasan Chip Systems , Atrenta ...
    Posted to Industry Insights (Weblog) by rgoering on Fri, Feb 5 2010
  • Apple A4: What We’ve Heard, What We Can Learn

    The big mystery behind the recent Apple iPad announcement is the A4 processor that powers this touchscreen, “tablet” PC. What’s in it, and why did Apple design its own system-on-chip (SoC) as opposed to using off-the-shelf hardware? First, I offer some tidbits of information and speculation...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Feb 3 2010
  • Should IC Designers Worry About Temperature?

    Three years ago I wrote an EE Times article about the growing importance of thermal gradients and thermal analysis at 90 nm and below. That article turned out to be ahead of its time. Today, thermal issues are not among the top few designer concerns at mainstream process nodes. But indications are that...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jan 21 2010
  • CES Provides Wake-Up Call for EDA

    Since consumer electronics is the primary driver for IC and systems design, what happens at the Consumer Electronics Show (CES) should interest the EDA community. Any trends in new consumer devices will point the way to design challenges EDA tools will have to solve. From looking at blogs and media coverage...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jan 11 2010
  • Are You Playing with a Full Deck?

    A professional gambler confidently place bets because she know the odds, but she would be crazy to play at a table that didn’t use a full deck because the odds change in an unknown way. If you use a simulator that doesn’t enable low-power verification in every test run, you are just as crazy...
    Posted to Functional Verification (Weblog) by Team genIES on Tue, Dec 15 2009
  • Interview With Teradyne on Metric Driven Verification

    Welcome to the first TeamMDV blog. We are excited to bring you information, tips, tricks and recommendations all centered around Metric Driven Verification (MDV). To start, here is an interview with Dylan Dobbyn, the verification manager at Teradyne, about their first time experience in implementing...
    Posted to Functional Verification (Weblog) by Team MDV on Fri, Nov 13 2009
  • We and Our Competitors Agree (Well, Almost!)

    It’s rare in EDA to see competitors agreeing, but an interesting article in EEtimes Europe this week caught my eye, by Lauro Rizzatti the VP Mktg of EVE. Lauro discussed a survey EVE ran during DAC, where they asked customers how they felt about the current state of hardware-assisted verification...
    Posted to System Design and Verification (Weblog) by SteveSvoboda on Thu, Nov 12 2009
  • Panel Question: Should Designers Do Their Own Verification?

    One question that prompted a lively discussion at the recent Cadence Mixed-Signal Design Summit was whether design engineers should do their own verification. This is a particularly good question for analog and mixed-signal design, where the tradition of separate verification teams is not as strong as...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Nov 11 2009
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