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SimVision,SystemVerilog language

  • Slow simulation caused by Assertions

    I am using -profile to investigate why my simulation is so slow, and I found the warning: ncsim: *W,FLSTRT the explanation of it is: The assertion is spending a significant amount of time starting new attempts that immediately terminate. In most assertions, such activity can be minimized by optimizations...
    Posted to Functional Verification (Forum) by nwang on Thu, Apr 4 2013
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