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Si2

  • Low Power Guide from Industry Leaders

    By Kenneth Chang, Core Comp AE, Frontend Solutions. Low power concerns continue to drive companies' needs for optimized ASIC methodologies, which is why one of the Si2 key initiatives continues to be the standardization of Low Power Intent. Below is just a couple of snapshots of posters which show...
    Posted to Logic Design (Weblog) by Team FED on Thu, May 28 2009
  • Power-Aware Design -- Time To Move Beyond Formats

    Magma Design Automation’s recent announcement that its Talus IC implementation suite now reads and writes the Common Power Format (CPF) is a welcome move. But the real challenge of low-power design is not a question of formats – it’s about building a cohesive ESL-to-tapeout power-aware...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 4 2009
  • The History of CPF

    I’ve shied away from getting into the power format wars – honestly, the whole question kind of bores me. I think everyone can agree that specifying your power intent in a single file that drives all the tools in the flow is a good thing. The specifics of which create_power_domain is used...
    Posted to Logic Design (Weblog) by Rich Owen on Mon, Oct 27 2008
  • Low Power: Free Stuff is Good Stuff

    Being both old and an engineer, I’m cheap. I really like free stuff. So, here are a few things you might find useful. And free. Si2 has just recently approved Common Power Format (CPF) v1.1. This represents the third generation CPF standard, incorporating lessons and requirements learned over the...
    Posted to Logic Design (Weblog) by Rich Owen on Thu, Oct 2 2008
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