Home > Community > Tags > Si2
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Si2

  • Another Expert’s View on Power Intent and Hierarchy

    Normal 0 false false false EN-US X-NONE X-NONE /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-priority:99; mso-style-qformat:yes; mso-style-parent:""; mso-padding-alt...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Sep 21 2011
  • An Expert’s View on Power Formats and Methodology

    In the last five years since the introduction of power formats, using a side file to describe power intent such as power domains, power modes and associated interface logic has become the mainstream low power design methodology. This marks great progress toward automating complex low power design techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Aug 24 2011
  • Si2’s Steve Schulz: “Setting the Standards for EDA360”

    EDA360 represents a significant change in which the EDA industry plays a broader role in the creation of hardware/software systems ready for applications deployment. A shift this profound must be rooted in industry standards, according to Steve Schulz, president of the Silicon Integration Initiative...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 27 2011
  • Low Power Design -- Alive and Well at DAC

    Low power design was undoubtedly one of the themes of DAC this year -- especially at the Cadence booth. We drew lively interest on the DAC floor with our low power demo station, which was continuously busy especially on the free Monday. We were showing a new demo explaining how advanced low power techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Jun 14 2011
  • New Proof Points for CPF-enabled Cadence Low Power Solution

    As the clock for the 48 th Design Automation Conference (DAC) ticks away, we at Cadence are scrambling to put the final touch-up on all our DAC activities. Even though my time is limited, I still would like to highlight the significance of two recent and seemingly unrelated events. First is a post at...
    Posted to Low Power (Weblog) by QiWang on Fri, Jun 3 2011
  • How EDA360 “Realizations” Leverage Industry Standards

    The EDA360 vision , articulated by Cadence one year ago, is not about one company - it's a vision for an entire industry. As such, EDA360 depends on a collaborative ecosystem with many players, including other EDA vendors, silicon IP providers, foundries, design services companies, and many others...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 9 2011
  • A Look Behind the Si2 CPF 2.0 Release

    The long awaited new version of the Common Power Format, CPF 2.0, was released by the Silicon Integration Initiative ( Si2 ), an industry standards organization, today. Here are several interesting observations from this latest release . First of all, this new release is a big step forward for interoperability...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Feb 15 2011
  • Power Modeling Standards Effort Aims to Ease IP Integration

    A new standards effort that could ease low-power silicon IP integration is quietly underway at the Silicon Integration Initiative (Si2) Low Power Coalition ( LPC ). Although the LPC is probably best known as the home of the Common Power Format (CPF) originated by Cadence, it actually has a much broader...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jan 26 2011
  • EDA Standards Review and Forecast, Part 2 – OSCI and Si2

    My last blog post provided a 2010 review and 2011 forecast for Accellera and IEEE EDA-related standards. This post looks at activity from the Open SystemC Initiative (OSCI) and Silicon Integration Initiative (Si2). Perhaps the most "newsworthy" item on this list is the 2010 emergence of the...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Dec 21 2010
  • Webinar: Cadence, Mentor Find Common Ground on PDK Standards

    Representatives of Cadence and Mentor Graphics don't often appear in the same webinar, but there's a new development in the industry that was important enough to bring these two EDA vendors together Dec. 7. That development is OpenPDK , a process design kit standardization effort launched by...
    Posted to Industry Insights (Weblog) by rgoering on Sun, Dec 12 2010
Page 3 of 5 (44 items) < Previous 1 2 3 4 5 Next >