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  • What's Good About Cadence Online Support Product Pages? – Check Out This List!

    I wrote about the new Cadence Online Support features in one of my blog posts last year. One of our Silicon Package Board (SPB) Customer Support AEs suggested that I include the Cadence Online Support Product Page URL whenever I write about a specific product’s feature. I will be doing that --...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Mar 2 2011
  • Concept HDL - global signal shorted

    Hello, I have the following problem: In the schematic if I change from a power symbol to a another one (like 2.5V to 1.5V). The Check routine returns me an error: Severity : Error (HDL Direct) Description : ERROR(SPCOHD-541): Global signal P2V5 is shorted with another global signal P1V5. Two global signals...
    Posted to PCB Design (Forum) by DavidP on Wed, Jan 27 2010
  • Strokes gone wild

    I have a user that has an intermittent problem with his cursor becoming a pencil that just keeps writing and writing. He exits concepts and returns and everything is fine. Any ideas?
    Posted to PCB Design (Forum) by SandraH on Tue, Jul 21 2009
  • What's Good About Allegro® Design Entry HDL – User Customizations? You Tell Me!

    Well ... if you like tweaking and tuning an environment to suit your needs, Allegro Design Entry HDL (DEHDL or previously known as ConceptHDL) has plenty to offer. I began in the Blog-sphere-posting-world of Cadence with one of my first posts titled - "How many DEHDL (Concept) designers customize...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Mar 11 2009
  • What's Good About Directive Locking?

    Do you wish you could lock specific aspects of a DEHDL design content? Do you need to standardize on color used for parts, wires, text, etc. in a design? Do you wish designers would maintain a standard grid? Well - all this (and more!) can be accomplished through the project .cpm file directive locking...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Oct 29 2008
  • Very strange warning... HELP!

    I am getting this warning on a few of my schematics and am not sure what to do with it or how to fix it... Description : WARNING(SPCOHD-184): A MERGE/TIE symbol connected to an OUTPORT symbol on one side must be connected to output pin(s) on the other side. Im using allegro in 16.01... Can anyone describe...
    Posted to PCB Design (Forum) by QSCMatt on Tue, Oct 28 2008
  • Arrays in SKILL

    I'm working with an SKILL code that contains an Array. But I got some problem with it. This code did work in all 15. releases but now in 16.01 it dosn't. Do anyone now about this? Thank, Johan Javinder
    Posted to PCB Design (Forum) by Javinder on Tue, Sep 16 2008
  • How to include manufacturing,Assembling notes???

    I am using Cadence pcb editor 16.01. I would like to include my Fab,Ass notes from word doc to layout(pcb editor).How to do this??? Thanks in Advance. Regards, Lingam
    Posted to PCB Design (Forum) by Lingam on Mon, Sep 1 2008
  • Techtorials, Demos, Roadmaps ... Poker?

    Hi All, For those who have not decided yet to attend this year's CDNLive! 2008 event in San Jose the week of September 8, 2008, you can read about some highlights in my Blog post . Of course, you can read all the details at the main CDNLive! 2008 web site. Jerry GenPart
    Posted to PCB Design (Forum) by Jerry GenPart on Wed, Aug 20 2008
  • Techtorials, Demos, Roadmaps ... Poker?

    What do these 4 have in common? CDNLive! 2008 San Jose - September 8 - 11, 2008. This is an outstanding event where we can learn about how companies are using Cadence solutions to expand their design environments. While most customers attend this event to learn all the new and exciting capabilities of...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Aug 20 2008
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