Log In
|
Register
|
Resource Library
|
Worldwide
Asia-Pacific
|
China
|
EMEA
|
India
|
Israel
|
Japan
|
Korea
|
Taiwan
|
Global Office Locator
Solutions
Products
Services
Support & Training
Alliances
Community
About Cadence
Solutions:
Design IP
Mixed-Signal
Low-Power
Advanced Node
3D-IC
Enterprise Verification
Hosted Design
System Development Suite
Solutions Home
Products for:
System Design and Verification
Functional Verification
Logic Design
Digital Implementation
Custom IC Design
RF Design
PCB Design
IC Packaging and SiP Design
Silicon Signoff and Verification
More Products
OrCAD Products
Sigrity Technologies
Design IP
Verification IP
IP Catalog
Products A-Z
Products Home
Capabilities and Practices
Methodology Services
Design Services
DFM Services
Educational Services
Programs
SOI Design Hub
Services Home
Support
Support Offerings
Support Process
Cadence Online Support
Software Downloads
Computing Platform Support
University Software Program
Training
Training Options
Training Course Catalogs
Support & Training Home
Programs and Initiatives
System Realization Alliance
Foundry Program
ChipEstimate.com - Chip Planning Portal
Connections Program
Verification Alliance Program
Channel Partner (VARs) Program
Power Forward Initiative
Standards and Languages
PCB Service Bureaus
Industry Memberships
Alliances Home
Communities
Industry Insights Blog
Low Power Blog
Mixed-Signal Design Blog
System Design and Verification
Cadence IP Blog
Functional Verification
Logic Design
Digital Implementation
Custom IC Design
RF Design
PCB Design
IC Packaging and SiP Design
Silicon Signoff and Verification
Quicklinks
All Blogs
All Forums
Community Search
CDNLive User Conferences
Community Home
EDA Vision
Visit the EDA360 microsite
News and Events:
Newsroom
Events and Webinars
Resources:
Customer Success
Newsletters
Publications
Multimedia Center
Logos
Company Info:
Investor Relations
Executive Team
Careers
Contact Us
About Cadence Home
Home
>
Community
>
Tags
> Rapid Prototyping Platform
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.
Register
|
Membership benefits
Get email delivery of the Cadence blog (individual posts).
Industry Insights
Low Power
Mixed-Signal Design
System Design
and Verification
Cadence IP Blog
Functional Verification
Logic Design
Digital Implementation
Custom IC Design
RF Design
PCB Design
IC Packaging and SiP Design
Silicon Signoff and Verification
All Blog Categories
Popular Tags
Allegro
Analog
ARM
cadence
DAC
Digital Implementation
e
EDA360
encounter
ESL
functional verification
Incisive
industry insights
Low power
Mixed-Signal
OVM
PCB
PCB design
Specman
System Design and Verification
SystemC
TLM
UVM
verification
Virtuoso
Browse All Tags
Email
*
Required Fields
Recipients email
*
(separate multiple addresses with commas)
Your name
*
Your email
*
Message
*
Send yourself a copy
Share
Twitter
Facebook
LinkedIn
Google+
Subscribe
RSS
Cadence RSS Feeds
Cadence Press Releases
System Design and Verification Blog
Functional Verification Blog
Digital Implementation Blog
Custom IC Design Blog
RF Design Blog
PCB Design Blog
IC Packaging and SiP Design Blog
Manufacturability Signoff Blog
All Blogs
System Design and Verification Forum
Functional Verification Forum
Digital Implementation Forum
Custom IC Design Forum
Custom IC SKILL Forum
Logic Design Forum
RF Design Forum
PCB Design Forum
PCB SKILL Forum
IC Packaging and SiP Design Forum
Manufacturability Signoff Forum
Intro copy of the newsletter section here, some intro copy of the newsletter. Instruction of how to subscribe to this newsletter.
Contact Us
Cadence Contacts
Community Relations
Customer Support
Employment
Investor Relations
Media Relations
Training
Global Office Locator
Find Offices worldwide
»
Sales Inquiry
Request for Product information
»
Cadence Channel Partners
»
Corporate Headquarters
Cadence Design Systems, Inc.
2655 Seely Avenue
San Jose, CA 95134
Phone: 408.943.1234
*
Required Fields
First Name
*
Last Name
*
Email
*
Company / Institution
*
Comments:
*
Send Yourself A Copy
Rapid Prototyping Platform
accelerated VIP
acceleration
Accellera
ACE
Adam Sherer
Adaptive Voltage Scaling
Altera
Amazon
AMBA
AMBA Designer
AMD
ARM
ARM Techcon
AVS
bring-up
Cadence
Cadence VIP portfolio
CDNLive
chip design
Chi-Ping Hsu
clock concurrent optimization
cloud computing
Co-Design
Cortex-M0
co-verification
Cruse
DAC
DAC 2012
DAC breakfast
DAC panel
design authoring
Design Automation Conference
EDA
EDA360
EDA360 Theater
EE Times
embedded software
Embedded World
embedded world conference
EMEA
emulation
ESL
festival
FPGA
FPGA prototyping
FPGA-based
FPGA-based prototypes
FPGA-based prototyping
FPGAs
Freescale
Functional Verification
hardware/software
hardware/software co-development
hardware/software integration
Incisive
Industry Insights
Jaeger
Joe Hupcey III
LSI
Palladium
Palladium XP
Prototyping
Quartus
rapid prototyping
RPP
SaaS
SCE-MI
Schirrmeister
Simpson
Simulation
Siwinski
SoC
software
software development
software/hardware
Specman
Steve Leibson
STMicroelectronics
Stratix
system design
System Design & Verification
System Development Suite
system realization
SystemC
Tablet
Tensilica
TLM
Verification Computing Platform
verification IP
VIP
virtual platforms
virtual prototoyping
virtual prototype
virtual prototypes
virtual prototyping
Virtual System Platform
VSP
webinar
Xilinx
Zynq-7000
How Hardware/Software Co-Development Fuels “Product Creation”
I've written recently about "product creation," a concept that looks beyond the chip or board and considers the requirements of the entire end product, including hardware, software applications, and mechanical enclosures. These requirements ripple down through the design supply chain and...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Apr 3 2013
Embedded World 2013: Virtual Platforms Connected to Everything
Sometimes it is hard to explain why certain ideas take off and why others don’t. There are many stories of poor products that are more successful than much better products. There are also many stories about products that struggle in one time or place, but the same thing is a big hit at another...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Fri, Feb 22 2013
User View: Combining Virtual Platforms, Emulation, and Hardware Prototypes
Chuck Cruse, team lead for emulation and FPGA-based prototyping at LSI Corp., wants to build a "deterministic" flow including virtual platforms, emulation, and hardware prototypes. In a recorded audio presentation at the Cadence web site, he describes the challenges he's experienced and...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jul 18 2012
DAC 2012: Users Cite Experiences With Hardware/Software Co-Development
Hardware/software co-development tools such as virtual prototyping, emulation, and FPGA-based prototyping are in use today and are making a difference. That was the message behind a Cadence-sponsored breakfast at the Design Automation Conference ( DAC 2012 ) June 5, where two users described their experiences...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Jun 17 2012
Designing ARM-Based SoCs? Don’t Miss This Event!
Do you design or program systems-on-chip using ARM processors - or plan to? If so, ARM TechCon is the place to be Oct. 25-27, 2011. Cadence is the official "signature sponsor" of this year's conference and has a number of papers and activities there. I'll first provide a general overview...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Sep 29 2011
Amazon’s New Kindles: More Steps Toward the Paperback Computer
While I understand that a new Kindle Fire at $199 MRSP is significantly more than a dime novel, I assert that today's launch of the new Amazon tablets takes us one step closer to the "paperback computer" becoming a reality. Here the term paperback computer isn't just a clever play on...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Wed, Sep 28 2011
Webinar: Easing the Pain of FPGA-Based Prototyping
Nearly every digital system-on-chip, ASIC or ASSP is prototyped in FPGAs, most typically for pre-silicon software development and debugging. The problem is that it can take months to get the prototype up and running with a functionally equivalent design. But there are easier ways to develop FPGA-based...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Sep 8 2011
Q&A: A Closer Look at the Cadence Rapid Prototyping Platform
Cadence entered a new marketplace with the recent introduction of the Rapid Prototyping Platform , an FPGA-based prototyping environment that supports pre-silicon software development and system validation. The Rapid Prototyping Platform is part of the tightly integrated System Development Suite , which...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jun 1 2011
Q&A: Hardware/Software Integration Challenges Demand System Realization Solutions
Hardware/software integration has become a major bottleneck in electronic design flows, according to Michał Siwiński, group director of System Realization product marketing at Cadence. It's also a major requirement for System Realization, described in the EDA360 vision paper as the creation of electronics...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, May 19 2011
2011 CDNLive EMEA Highlights and Image Gallery: An EDA360 Spring Festival of Deliverables
Last week teammate Adam Sherer and I had the honor of representing the Incisive functional verification platform at the annual CDNLive for Europe, the Middle East and Africa (EMEA) in Munich, Germany. Among our tasks was to deliver the annual verification roadmap update; support numerous techtorials...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Tue, May 10 2011
Page 1 of 2 (12 items) 1
2
Next >