Home > Community > Tags > RTL/Virtuoso
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *


  • Re: mixed signal simulation

    thanks for your valuable guidance.... sir, in my project i have designed one block in verilog.Now i need to integrate it to the remaining analog blocks. so i generate verilog netlist of the corresponding digital block. But after integrating it with analog block i need to check functional and transistor...
    Posted to Mixed-Signal Design (Forum) by KUMARJAYA on Thu, Jul 17 2014
  • IBIS model simulation

    I am designing a Data acquisition system with a Texas instruments ADC, Inamps and a ST micro electronics micro controller. I am getting spice models for my inamps, differential amplifiers etc. so that I could do SPICE simulation. I wish to see the output of my ADC if I am providing an input signal with...
    Posted to PCB Design (Forum) by niranjan madha on Wed, Apr 17 2013
  • Differences between pins from digital and analog views of a schematic

    Hi, I have a mixed schematic, mostly analog but with some embedded digital controllers. The digital parts were made in SystemVerilog and imported into the correct views in virtuoso together with the schematics. Then using RC and Encounter the schematics and layout views were generated and also imported...
    Posted to Mixed-Signal Design (Forum) by glennramalho on Tue, Jan 22 2013
  • User View: Bringing Digital Control Logic into Analog ICs

    austriamicrosystems is an analog IDM that designs and manufactures ICs for applications such as power management, sensors, and sensor interfaces. But the company is not purely "analog." Most of its analog ICs have small amounts of digital control or bus interface logic, said Thomas Moerth,...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jul 13 2011
  • Problems Importing OA Design from Virtuoso into Encounter

    Hello, While trying to perform place and route using Encounter I'm "encountering" errors importing my design from Virtuoso. When I try to import the design, I get the following: Reading tech data from OA Library 'NCL' ... FE units: 0.001 microns/dbu, OA units: 0.001 microns/dbu...
    Posted to Digital Implementation (Forum) by TruLogic on Mon, Jan 10 2011
Page 1 of 1 (5 items)