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RTL Compiler,HAL

  • Synthesizing 'x'

    Hi, look at the following code: always @(*) begin o = 2'bxx; if (a) o = 2'd0; else if (b) o = 2'd1; else if (c) o = 2'd2; else if (d) o = 2'd3; end signal o is DC (don't care) if none of the inputs (a,b,c,d) is asserted. I used the 2'bxx value because (1) it's easier to...
    Posted to Logic Design (Forum) by Tzachi Noy on Mon, Jul 11 2011
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