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RF designer,wireless integrated circuit verification

  • Measuring 2-Tone Intermodulation Using Envelope-Following Analysis

    From time to time, SpectreRF users simulate very large, extracted-view circuits in 2+ tone QPSS. In many of those cases, memory requirements exceed the available resources. When that happens and small-signal approximations aren’t applicable, the user is typically stuck. The solution below and attached...
    Posted to RF Design (Weblog) by Tawna on Wed, May 16 2012
  • Cadence, the new kid on the Electromagnetic Solver Block

    On June 16 2008, Cadence introduced a new Electromagnetic (EM) solver technology to address the challenges of verifying wireless integrated circuits implemented in advanced CMOS process nodes. You can read the press release here . How is this going to help the RF designer? Virtuoso® RF Designer brings...
    Posted to RF Design (Weblog) by Kabir on Fri, Jul 11 2008
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