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RF design

  • CDN Live! Silicon Valley -- A Video Invitation From Cadence CMO John Bruggeman

    CDNLive! Silicon Valley , the largest of the CDNLive! Cadence user conferences, will be open for worldwide participation in 2009. This year’s conference is a webinar-based event that allows on-line participation as well as on-site attendance at Cadence’s San Jose, California headquarters...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Sep 23 2009
  • Regarding Green Masking IN RF Circuit

    Dear All We are into designing an RF circuit.I want to know if green masking on the both sides of board will do any good.What will be its effect? And what about impedance matching?Do we need to take some special care to achieve it? Thanks in advance. Regards RaKesh Kumar
    Posted to PCB Design (Forum) by Rakeshd2 on Fri, Sep 18 2009
  • Re: How to run the spectreS Simulator faster ?

    Thanks for your response, I am using this version of spectre: sub-version I am trying to do a long simulation like 6.6ms. After 976.254us, i got this message. Error found by spectre at time = 976.254 us during transient analysis `tran'. SST2 Error: No space left on device Analysis...
    Posted to RF Design (Forum) by Riccart07 on Thu, Sep 3 2009
  • DesignCon 2010 Call for Papers

    Hello, As a member of the technical committee and as the chair member for the Analog and Mixed-Signal Design and Verification track, I would like to invite you to submit an abstract to this conference. We solicit papers for two types of sessions: technical papers and tutorials. Technical papers, which...
    Posted to Custom IC Design (Weblog) by helenet on Mon, Jul 20 2009
  • RF Measurement Library: Capturing Circuit Characterization Setups on the Schematic

    Another design approach that Cadence supports that may not be obvious to all users… The process of setting up a circuit simulation has historically been one of setting up all of the simulation control parameters (i.e. which analysis you want to run, what simulation data you want to save, accuracy...
    Posted to RF Design (Weblog) by alanw on Thu, Jul 16 2009
  • take a fixed step time

    hi everybody did anyone know how to make a fixed step time for a transient analysis. thanks
    Posted to RF Design (Forum) by kamel on Mon, Jul 13 2009
  • set a random input data

    hi did anybody know how to enter a random input data to perform a simulation using spectre (eg 1101...) thank you
    Posted to RF Design (Forum) by kamel on Fri, Jul 10 2009
  • Periodic Steady-State Analysis for DC-to-DC Converters

    In " Spectre RF by any other name ...", a non-RF application for Spectre RF's periodic steady-state analysis was introduced. An example of using periodic steady-state analysis [PSS] to simulate the dynamic performance: THD and SFDR, of a switched-current Digital-to-Analog Converter [DAC...
    Posted to RF Design (Weblog) by Art3 on Tue, Jun 30 2009
  • Join us at the Cadence booth at the International Microwave Symposium

    If you listened to Tom's advice on this blog two months ago and registered for the International Microwave Symposium or the RFIC symposium, then you should be at the Boston Convention center now enjoying RFIC talks. Please remember that we are waiting for you at the Cadence booth on the exhibition...
    Posted to RF Design (Weblog) by Hany on Mon, Jun 8 2009
  • spectre RF Noise-Aware PLL -plugin

    Hello My virtuoso version is IC6.1.3.1 I want to make the PLL simulation using the Cadence 6.1.3 tool PLL Macro Model Wizard. First I followed this: To use a plugin, ADE needs to run in batch mode. This option can be set in the .cdsinit file by using envSetVal("spectre.envOpts" "controlMode"...
    Posted to RF Design (Forum) by 4321 on Mon, Jun 1 2009
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