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RF Design,RFIC

  • Impedance measurement

    Sir/Madam, I have been designing a Differential drive rectiifer for UHF passive RFID in 130nm CMOS process. As the design of rectifier completes I got stuck with the impedance measurement, i.e. for finding input impedance of rectifier using Cadence Virtuoso. As it is a non-linear circuit which simulation...
    Posted to RF Design (Forum) by Jithin on Mon, May 12 2014
  • Monte carlo analysis

    sir i am ,, using IC 5.10.40 in cadence , ,, I want to make monte carlo analysis for my circuit , but my seniors here are telling that monte carlo is not working here in the version ,, how can i check that ?.. i am just beginer , please reply ,,
    Posted to RF Design (Forum) by rakesh reddy on Thu, Mar 20 2014
  • Transient results as starting point in PSS

    Hello, Could we use the transient analysis results as a stabilization point (tstab) for PSS analysis? If so, how could we acheive it? Is there any documentation on this? Any inputs will be helpful. Prakash.
    Posted to RF Design (Forum) by pthoppay on Mon, Mar 10 2014
  • Issue with Envelope analysis

    Hi, I am simulating the I/Q upconversion using port through envelope analysis. The I input pwl file has samples of a cosine of frequency=5MHz and timestep=0.00125us. The Q input pwl file has samples of value=0 and timestep=0.00125us. The original I, Q pwl files have data upto 2ms. I have attached the...
    Posted to RF Design (Forum) by AparnaG on Sat, Mar 8 2014
  • modelling reflection in Cadence Virtuoso

    Hello Sir, I have been trying to design a UHF passive RFID tag in 130nm on Cadence Virtuoso IC 5.4.1. As for the design of a matching network between Antenna and Rectifier of RFID please tell me how reflections, if not matched, been modelled in Cadence Virtuoso. So whether I have to use any specifice...
    Posted to RF Design (Forum) by Jithin on Wed, Feb 26 2014
  • Fully differential opamp caluculations

    I made this schematic and I simulated this I am getting gain ~40dB and UGB 20Mhz, I want to do stability analysis for this fully differential ckt , And I want to find out --- CMRR --- PSRR ---Loop gain (from stability analysis ) How I should use cmdprobe to do stb analysis , please help me
    Posted to RF Design (Forum) by rakesh reddy on Tue, Feb 11 2014
  • STM065 536 Design Kit

    Hi, I am new with Cadence community I hope I get some help. I start to work on the STM065 536 design kit which support RFCMOS as well. I have a problems with the suitable model libraries that I should load in the ADE env in order to simulate some simple circuit, that for example has PMOS and NMOS of...
    Posted to RF Design (Forum) by paderborn on Fri, Jan 10 2014
  • Simulating Quadrature Injection locked multiplier (tripler) in Cadence

    Hello Initial information - Using Cadence virtusoso 6.1.5-64b & spectre simulator for designing the followingquadrature injection locked frequency tripler. circuit Diagram - The first input I gave was a 14.66GHz signal The frequency spectrum of the output is as below: ANd then I changed the input...
    Posted to RF Design (Forum) by rohan kr on Sun, Sep 22 2013
  • SpectreRF at 2013 IEEE/MTT-S International Microwave Symposium in Seattle, Washington

    If you are attending the International Microwave Symposium ( IMS 2013 ) in Seattle (June 2-7, 2013) stop by the Cadence Design Systems booth, #427. We will be showing new MMSIM12.1.1 features including “Smart” HB GUI, Robust and easy to use nport (for s-parameter input), and the Transmission...
    Posted to RF Design (Weblog) by Tawna on Thu, May 23 2013
  • Measuring Bipolar Transistor ft with Fixed Base-Collector Voltage

    Recently I had a question from reader. He asked a good question: "How do you to measure a bipolar transistor's ft when the base-collector voltage, Vbc, is fixed?" Attached is a modified version of the testbench that allows a user to measure ft with a fixed Vbc. While the aesthetics are...
    Posted to RF Design (Weblog) by Art3 on Tue, Jun 12 2012
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