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How TSMC Reference Flow 12 Uses Virtual Prototyping
Just one month after the announcement of the Cadence System Development Suite, three of the four hardware/software development platforms in that suite have become part of the TSMC Reference Flow 12 . This includes the new Virtual System Platform , a virtual prototyping solution that provides early software...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Jun 6 2011
How to Control Power Switch Rush Current
While there are multiple techniques for reducing power consumption, shutting off power domains is the main method used to reduce leakage power consumption. In power shut-off designs, there are multiple aspects designers need to take care of, including IR drop, turn-on time, rush current, and the number...
Posted to
Low Power
(Weblog)
by
SunilVGokhale
on Wed, May 11 2011
Allegro 16.5 Powers up Allegro PCB PDN Analysis
Attendees of DesignCon 2011 received a sneak peek , and now Allegro PCB designers can officially check out a new power delivery network (PDN) analysis solution as part of the Allegro 16.5 release . Accurate, flexible, and highly integrated, Allegro PCB Power Delivery Network Analysis provides a unique...
Posted to
PCB Design
(Weblog)
by
TeamAllegro
on Fri, Apr 29 2011
ARM Keynote: Some Inconvenient Truths About Low-Power Design
While there have been many advances in low-power IC design, it still involves tough choices and poses difficult questions, according to Rob Aitken, R&D fellow at ARM. Aitken talked about the myths and realities of low-power design in a keynote speech at the recent IEEE Electronic Design Processes...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Apr 17 2011
Q&A: Jim Hogan Identifies Custom/Analog Challenges and Solutions
Jim Hogan has been a mover and shaker in the EDA industry since long before the term "EDA" was invented. Today a well-known independent venture capitalist, Hogan previously ran both R&D and marketing for the Cadence Virtuoso product, and he knows the custom/analog world well. He's invested...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Mar 20 2011
User Experience: Optimizing Power and Area With Formal Verification
Formal verification can be a powerful tool for low-power design optimization, according to a paper authored by Cadence and Freescale and presented at the recent DVCon conference. The paper showed how formal property checking can validate whether retention flip-flops are controllable, and identify those...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Mar 17 2011
Report from Japan – Quake Brings New Perspective on “Power”
Back in December, I wrote a blog entry entitled " Perspective on Power - 300 Designers and 20,000 Miles Later... ". After the latest leg of my travels last week, taking our EDA360 Tech on Tour Low Power Symposium on the road to Taiwan and Japan, I intended to write an update to that blog article...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Tue, Mar 15 2011
Team Allegro Continues Demonstration of New PDN Analysis Technology at DesignCon 2011
Today at DesignCon, drop by the Cadence booth to see TeamAllegro continue the demonstration of our new power delivery network (PDN) analysis technology for PCB design and analysis. See how during the pre-route phase of PCB design, plane shapes can be planned and optimized along with the PCB stackup....
Posted to
PCB Design
(Weblog)
by
TeamAllegro
on Wed, Feb 2 2011
Team Allegro Showing New PCB PDN Analysis Technology at DesignCon 2011
Today at DesignCon, drop by the Cadence booth to see TeamAllegro demonstrate the new power delivery network (PDN) analysis technology for PCB design and analysis. This is important because higher speed technologies such as DDR3 require lower voltages. Lower voltages provide less margin for IR drop caused...
Posted to
PCB Design
(Weblog)
by
TeamAllegro
on Tue, Feb 1 2011
Team Allegro to Boost Power of PCB PDN Solution – Sneak Peek at DesignCon 2011
The Cadence booth at DesignCon 2011 will provide visitors with a demonstration of new technology that has been developed for analysis of the power delivery network (PDN) of a printed circuit board (PCB). This new technology features enhanced static IR drop analysis, and is the foundation of a complete...
Posted to
PCB Design
(Weblog)
by
TeamAllegro
on Mon, Jan 31 2011
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