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Power Analysis

  • Tapeout!

    With an early December tapeout looming, I've found myself too busy to write a post this week. But then I thought, "Why not write about tapeout?". Here are some things I try to do during a project so that those last few weeks before a deadline are as stress-free as possible: Run an early...
    Posted to Digital Implementation (Weblog) by Kari on Thu, Nov 20 2008
  • The Power of Cadence System Power Flow vs. Viewing from the Top

    I feel that I must respond to the following blog published by Frank Schirrmeister. Virtual prototypes clearly have their value and their place in the SoC design flow (especially as platforms for software development) but they are hardly a substitute for hardware-assisted solutions and you need to find...
    Posted to System Design and Verification (Weblog) by Ran Avinun on Wed, Oct 29 2008
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