Cadence.com will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST).
Cadence.com login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Tags > PCB
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

PCB

  • Contract PCB Designer Milwaukee WI

    We are looking for an PCB designer with experience in OrCAD Designer for short term contract(s) in the Milwaukee Area to work on site Experience with switching power supplies, high speed digital circuits, etc. is desirable. Must be thorough, organized and motivated. Email a resume and, if possible, a...
    Posted to Jobs (Forum) by tvarghese on Mon, May 3 2010
  • What's Good About APD’s Super Smooth Routing? See for yourself in the SPB16.3 Release!

    When using the point-to-point routing in the packaging products ( APD and SIP ), customers spend a significant amount of their efforts to clean up the traces after routing. The “Custom Smooth” function provides this capability, but a separate step is needed. In the SPB16.3 release, the new option - ...
    Posted to PCB Design (Weblog) by Jerry GenPart on Thu, Apr 29 2010
  • Autoroute option in Orcad 16.3 not available

    Hello, It is probably just a license issue, anyway, in case I am missing some Allegro package or any other service pack, I assume it would be faster to post the question. I downloaded the 16.3 version (demo) from cadence and I am running an example from a tutorial to route 3 resistors, captured from...
    Posted to PCB Design (Forum) by MFranco on Tue, Apr 6 2010
  • What Is FPGA/PCB Co-Design - And Why Is It Needed?

    You may think that FPGAs are "easy" to design compared to ASICs or SoCs. But just wait until you try putting a large, complex FPGA on a printed circuit board. Several things could go wrong - including pin assignments that don't work in the board layout, signal integrity problems on the...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 5 2010
  • What's Good About Support Service And Design Bureau Providers? AcAe Can Help!

    I usually discuss our SPB solution technical capabilities in my weekly blogs, but decided to chat about this week's press announcement - " Cadence Teams with AcAe to Accelerate Customer Transitions to Allegro PCB Products " - and ask what works the best for you when you've engaged with...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Mar 31 2010
  • Printed Circuit Board (PCB) Designer – Richardson, TX

    Printed Circuit Board (PCB) Designer – Richardson, TX Design Service Bureau/Contract Manufacturer is seeking a Printed Circuit Board Designer with at least 2 years of experience. This full time, salary position includes: Profit Sharing, Medical, Dental, Orthodontics (Children only), Life Insurance...
    Posted to Jobs (Forum) by Friedemann on Fri, Mar 26 2010
  • Shape to Route Keepin Spacing

    OrCAD PCB Designer v16.2 I am getting the following DRC error, regarding an auto-generated shape (ground or power pours). I get it on multiple layers with multiple pours: Constraint Name = Shape to Route Keepin Spacing Required Value = 0 MIL Actual Value = 0 MIL Constraint Source = DEFAULT Constraint...
    Posted to PCB Design (Forum) by melview1 on Tue, Feb 23 2010
  • Delete, out of date shape

    Hello, new user, learning, currently running OrCAD PCB Designer 16.2. I am trying to create the artwork of a test PCB, message is Dynamic shapes need updating. Goto View Status, Out of date shapes 1/22. Dynamic shapes state: Dynamic shapes out of date: 1 out of 22 Current fill mode : SMOOTH Layer = TOP...
    Posted to PCB Design (Forum) by Rolf2U on Wed, Feb 17 2010
  • Allegro PCB SI Offers Out-of-the-Box IBIS 5.0 Support

    IBIS is sometimes known as the bird of knowledge, but is also the popular standard in modeling I/O buffers. Well, IBIS recently grew some big new wings when the 5.0 version of the spec was ratified. Those big wings include support for algorithmic modeling of SerDes transceivers. Instead of just modeling...
    Posted to PCB Design (Weblog) by Maxwell86 on Thu, Feb 11 2010
  • skill code to delete existing films

    Does anyone have a skill code that will delete existing films? I have code to create my films from a GUI, but only on a new board file (only top and bottom to start with). I need to be able to delete existing films then add my new films, otherwise I get my new films and the old ones still exist. Thanks...
    Posted to PCB SKILL (Forum) by Pieman on Mon, Feb 8 2010
Page 23 of 25 (249 items) « First ... < Previous 21 22 23 24 25 Next >