Home > Community > Tags > PCB/Capture CIS/DRC error/No_5F00_pad/Outline/Constraint Manager/Logic synchronization failed/pcb editor/circuit too large/padstack change/Allegro PCB SI/hi all/Hierarchical
 
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PCB,Capture CIS,DRC error,No_pad,Outline,Constraint Manager,Logic synchronization failed,pcb editor,circuit too large,padstack change,Allegro PCB SI,hi all,Hierarchical

  • PCB autorouter(spectraa) not converging

    Hi, I am making my first pcb with a xilinx fpga device(256 pin BGA package).I am simply connecting the all I/O's to 4 standard 40 pin connectors.Are padstacks necessary for PCB routing??.I have drawn the schematic in Capture imported it to Layout_Plus and autorouted it. But after 3 hours of autorouting...
    Posted to PCB Design (Forum) by bennyn1 on Thu, Sep 2 2010
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