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PCB,Allegro PCb,Constraint Manager

  • PCB autorouter(spectraa) not converging

    Hi, I am making my first pcb with a xilinx fpga device(256 pin BGA package).I am simply connecting the all I/O's to 4 standard 40 pin connectors.Are padstacks necessary for PCB routing??.I have drawn the schematic in Capture imported it to Layout_Plus and autorouted it. But after 3 hours of autorouting...
    Posted to PCB Design (Forum) by bennyn1 on Thu, Sep 2 2010
  • Shape to Route Keepin Spacing

    OrCAD PCB Designer v16.2 I am getting the following DRC error, regarding an auto-generated shape (ground or power pours). I get it on multiple layers with multiple pours: Constraint Name = Shape to Route Keepin Spacing Required Value = 0 MIL Actual Value = 0 MIL Constraint Source = DEFAULT Constraint...
    Posted to PCB Design (Forum) by melview1 on Tue, Feb 23 2010
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