Home > Community > Tags > PCB Signal and power integrity/SerDes/PCB
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

PCB Signal and power integrity,SerDes,PCB

  • Allegro PCB SI Offers Out-of-the-Box IBIS 5.0 Support

    IBIS is sometimes known as the bird of knowledge, but is also the popular standard in modeling I/O buffers. Well, IBIS recently grew some big new wings when the 5.0 version of the spec was ratified. Those big wings include support for algorithmic modeling of SerDes transceivers. Instead of just modeling...
    Posted to PCB Design (Weblog) by Maxwell86 on Thu, Feb 11 2010
Page 1 of 1 (1 items)