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"We Want UVM 1.0! When Do We Want it? Now!"
Short of holding signs and yelling slogans, the 12 customers I visited in the past week all declared this mantra. All are planning to move to UVM 1.0 with all of them requiring the phasing and register package capabilities, but only one also requiring TLM2 support, primarily for accessing SystemC models...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Thu, Oct 7 2010
UVM - 10 Years in the Making ...
In case you the missed the news today, the Accellera VIP TSC released the first version of the Universal Verification Methodology (UVM). This represents a significant achievement on the part of the TSC as it is the first standard SystemVerilog Base-Class Library and Methodology. While there has been...
Posted to
Functional Verification
(Weblog)
by
mstellfox
on Mon, May 17 2010
Inside Cadence: Training for EDA360
Over the past few weeks all of Cadence's Verification and Systems Solutions Applications Engineers (AEs), Services Engineers, and many Customer Support staff, have been brought together for detailed methodology and product training. The objectives of this ambitious undertaking are to bring their...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Thu, May 6 2010
Adam’s Verification Top 10 In '10
I love top 10 lists. Not so much for the drama of the count-down, but for arguments that inevitably fall out of any prioritization. So here is my verification top 10 in '10, let the rants begin! 10. VHDL 1076-2009 Support . Huh? How did this get here? Given the breadth of IES (Incisive Enterprise...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Tue, Dec 29 2009
OVM Innovation Means Business
Today, Cadence recognized it's OVM team for their innovative contribution to the Cadence enterprise starting in 2008. Why enterprise? To me, enterprise is the most exciting part because it underscore how the OVM has rallied all of Cadence verification around a common cause which has both polished...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Tue, Nov 3 2009
OVM Tricks and Treats
Your kids may be going house to house for treats, but you can get a big OVM sugar rush from Cadence's OVM World contributions. Each delectible nugget is wrapped in documentation that helps you savor all the goodness. So reach into the bowl and indulge in these methodology sweets! Callback Mechanism...
Posted to
Functional Verification
(Weblog)
by
Team genIES
on Fri, Oct 30 2009
Where’s The “You” In The OVM?
Cadence and Mentor have dedicated teams to the development and support of the OVM and you, our user community, have literally tens of thousands of developers dedicated to developing reusable VIP with it. But where do “you” and the OVM meet? Sometimes the “you” is obvious –...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Tue, Oct 27 2009
Why OVM? John Aynsley of Doulos Has 10 Reasons
Believe it or not, sometimes a marketing guy just needs to say less. It's true. It does happen. Sometimes we do just get right to the point. Yeah, we do blather on sometimes but ... oops, there I go again. Just listen to John. He has 10 great reasons to adopt the OVM. If video fails to play please...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Thu, Oct 22 2009
Write Right OVM Verification Components
The OVM provides the most comprehensive reuse if you follow the methodology it prescribes. While its unique built-in classes are the technical heart of the reuse, you still have to write your own components. Now you have the new Paradigm Works OVC Template Generator to write them in the right way for...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Fri, Jul 17 2009
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