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NCSim,verification

  • How to probe VHDL function variables in ncsim?

    Hi, I need to view the variables used inside a function in simvision waveform viewer. How to add a probe to view these variables in the viewer? Thanks, Venkat
    Posted to Functional Verification (Forum) by venkub on Wed, Jun 12 2013
  • Internal error during elabration phase

    Hi, I am facing the below error when i tried to simulate a simple verilog environment,is this the tool setup issue w.r.t my source file or something other,please help me out. Writing initial simulation snapshot: worklib.tb_counter:v ncsim: *F,INTERR: INTERNAL ERROR Observed simulation time : 0 FS + 0...
    Posted to Functional Verification (Forum) by mdkaleem on Tue, Sep 4 2012
  • end-of-test

    Hi All, I am running one testcase in which i am waiting for power-on-reset to be over and then doing some sequence. In the pre_body i have raised objection and in post_body i have dropped the objection. ISSUE : In the testcase as soon as reset is getting over in the next clock edge i am getting this...
    Posted to Functional Verification (Forum) by Ravisinha on Tue, Oct 19 2010
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